Methods for fabrication of bonded wafers and surface acoustic wave devices using same

A method of fabricating a bonded wafer with low carrier lifetime in silicon, the method comprising:

• providing a silicon substrate having opposing top and bottom surfaces;
• modifying a top portion of the silicon substrate to impair an ability of the top portion to behave like a semiconductor by forming locations in the top portion which trap free carriers;
• bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate;
• providing a pair of electrodes having fingers that are inter-digitally dispersed on the top surface of the piezoelectric layer in a pattern having a center-to-center distance D between adjacent fingers of the same electrode, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device, the modified top portion of the silicon substrate preventing creation of a parasitic conductance within the top portion of the silicon substrate during operation of the SAW device;
• and
• providing an insulation layer between the silicon substrate and the piezoelectric layer,
• wherein:
• the modifying and bonding steps are performed in any order;
• the modifying and providing the insulation layer steps are performed in any order;
• T<(1.76−2.52e-4*(VSUB+4210−VPIEZO)−(0.50*TI))*D;
• VSUB is a velocity of a slowest acoustic wave in a propagation direction in the silicon substrate;
• VPIEZO is a SAW velocity in the piezoelectric layer;
• and
• TI is a thickness of the insulation layer.