Interface engineering for high capacitance capacitor for liquid crystal display

A method for forming a capacitor structure on a substrate for thin film transistor applications comprising:

• forming a gate electrode disposed overlying a substrate;
• forming a common electrode disposed overlying the gate electrode;
• forming a dielectric layer on the common electrode, wherein the dielectric layer includes a bulk dielectric material sandwiched between a top interface protection layer and a bottom interface protection layer;
• and
• forming a pixel electrode on the dielectric layer, wherein the top interface protection layer is formed in contact with the pixel electrode and the bottom interface protection layer is formed in contact with the common electrode.

A method for forming an insulating layer on a substrate for thin film transistor applications comprising:

• forming a gate electrode disposed overlying the substrate;
• forming a common electrode disposed overlying the gate electrode;
• forming a high-k layer on the common electrode by an atomic layer deposition process or a hybrid process including atomic layer deposition and chemical vapor deposition process, wherein the high-k layer includes a bulk dielectric material sandwiched between a top interface protection layer and a bottom interface protection layer, wherein the high-k layer is one of a gate insulating layer, a passivation layer, a capacitor, an interlayer insulator, an etch stop layer in a thin film transistor device;
• and
• forming a pixel electrode on the high-k layer, wherein the top interface protection layer is formed in contact with the pixel electrode and the bottom interface protection layer is formed in contact with the common electrode.