Dense vertical field effect transistor structure

A semiconductor structure comprising:

• a substrate having a first section doped with a first dopant and a second section doped with a second dopant;
• an insulator interposed between the first and second sections;
• a first fin extending upwardly from the first section;
• second and third fins extending upwardly from the second section;
• a shared gate region operably interposed between the first and second fins;
• and
• a gate separation region operably interposed between the second and third fins,
• wherein:
• the first section is provided as a pair of sub-sections between which the second section is interposed;
• the insulator is provided as a pair of insulators interposed between the second section and each of the pair of sub-sections;
• the first fin is provided as a pair of first fins extending upwardly from each of the pair of sub-sections, respectively;
• and
• the shared gate region is provided as a pair of shared gate regions of which one is operably interposed between one of the pair of first fins and the second fin and the other is operably interposed between the other of the pair of first fins and the third fin.

A method of forming a dense vertical field effect transistor (VFET) semiconductor structure, the method comprising:

• extending a first fin upwardly from a first section of a substrate which is doped with a first dopant;
• extending second and third fins upwardly from a second section of the substrate which is doped with a second dopant and which is insulated from the first section;
• operably interposing a conductor configured to be shared between proximal gates between the first and second fins;
• and
• operably interposing a dielectric material configured to separate proximal gates between the second and third fins,
• wherein:
• the extending of the first fin comprises extending a pair of first fins from a pair of sub-sections of the first section between which the second section is interposed;
• and
• the operably interposing of the conductor comprises operably interposing the conductor between one of the pair of first fins and the second fin and operably interposing the conductor between the other of the pair of first fins and the third fin.

A method of forming a dense vertical field effect transistor (VFET) semiconductor structure, the method comprising:

• extending a first fin upwardly from a first section of a substrate which is doped with a first dopant;
• extending second and third fins upwardly from a second section of the substrate which is doped with a second dopant and which is insulated from the first section;
• operably interposing a conductor configured to be shared between proximal gates between the first and second fins;
• and
• operably interposing a dielectric material configured to separate proximal gates between the second and third fins,
• wherein the operably interposing of the dielectric material between the second and third fins comprises:
• depositing a liner over at least exterior surfaces of the first, second and third fins;
• depositing the dielectric material over the liner;
• etching the liner along sidewalls of the first, second and third fins to form trenches between the dielectric material and the sidewalls of the first, second and third fins;
• lining the trenches with high-k dielectric material;
• and
• filling remainders of the trenches with work function metal (WFM).

A method of forming a dense vertical field effect transistor (VFET) semiconductor structure, the method comprising:

• extending a first fin upwardly from a first section of a substrate which is doped with a first dopant;
• extending second and third fins upwardly from a second section of the substrate which is doped with a second dopant and which is insulated from the first section;
• operably interposing a conductor configured to be shared between proximal gates between the first and second fins;
• and
• operably interposing a dielectric material configured to separate proximal gates between the second and third fins,
• wherein the operably interposing of the dielectric material between the second and third fins comprises:
• forming a mask over the dielectric material;
• etching unmasked dielectric material to form conductor locations;
• and
• filling the conductor locations with a conductor.

A method of forming a dense vertical field effect transistor (VFET) semiconductor structure, the method comprising:

• extending a first fin upwardly from a first section of a substrate which is doped with a first dopant;
• extending second and third fins upwardly from a second section of the substrate which is doped with a second dopant and which is insulated from the first section;
• operably interposing a conductor configured to be shared between proximal gates between the first and second fins;
• and
• operably interposing a dielectric material configured to separate proximal gates between the second and third fins,
• wherein the method further comprises:
• recessing work function metal (WFM), a conductor and dielectric material from between and around the first, second and third fins to form recessions;
• depositing bottom spacer material in the recessions;
• filling remainders of the recessions with dielectric material;
• polishing the bottom spacer and dielectric materials;
• removing exposed bottom spacer material;
• and
• executing epitaxial growth at spaces from which the exposed bottom spacer material is removed.