Structure and method for integrated circuits packaging with increased density
AssigneeInvensas Corporation
InventorsCharles G. Woychik, Arkalgud R. Sitaram, Andrew Cao, Bong-Sub Lee
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AssigneeInvensas Corporation
InventorsCharles G. Woychik, Arkalgud R. Sitaram, Andrew Cao, Bong-Sub Lee
Estimating the term…
A method of forming a semiconductor package comprises forming one or more first vias in a first side of a substrate and attaching a first side of a first microelectronic element to the first side of the substrate. The first microelectronic element is electrically coupled to at least one of the one or more first vias. The method further comprise obtaining a second microelectronic element including one or more second vias in a first side of the second microelectronic element, and attaching a second side of the substrate to the first side of the second microelectronic element. The second microelectronic element is electrically coupled to at least one of the one or more first vias. Each of one or more connecting elements has a first end attached to a first side of the second microelectronic element and a second end extends beyond a second side of the first microelectronic element.
An assembly comprising:
An assembly comprising a plurality of modules, each module of the plurality of modules of the assembly comprising:
Dependencies are inferred from the claim text.