Method and system for providing a reverse-engineering resistant hardware embedded security module

A hardware-embedded security system comprising:

• a plurality of connective components including a variable conductivity layer, the variable conductivity layer being conductive for a first stoichiometry and being insulating for a second stoichiometry, the variable conductivity layer being conductive for a first portion of the plurality of connective components and being insulating for a second portion of the plurality of connective components, the first stoichiometry and the second stoichiometry including at least one of TayNx layer, a TiyNx layer, a WyNx layer, a HfyNx layer, a ZryNx layer and a MoyNx, wherein x and y indicate a varying stoichiometry;
• a plurality of circuit elements, the first portion of the plurality of connective components being connected to a first portion of the plurality of circuit elements, the second portion of the plurality of connective components being connected to a second portion of the plurality of circuit elements such that the first portion of the plurality of circuit elements are active and the second portion of the plurality of circuit elements are inactive, the plurality of circuit elements including at least one of a plurality of memory cells and a plurality of gates, the variable conductivity layer for the plurality of conductive components adjoining the plurality of circuit elements;
• an insulator adjacent to at least a portion of each of the plurality of connective components, the first stoichiometry being indistinguishable from the second stoichiometry via optical imaging and electron imaging of a portion of the insulator and the variable conductivity layer.

A method for providing a hardware security system comprising:

• a plurality of connective components including a variable conductivity layer, the variable conductivity layer being conductive for a first stoichiometry and being insulating for a second stoichiometry, the variable conductivity layer being conductive for a first portion of the plurality of connective components and being insulating for a second portion of the plurality of connective components, the first stoichiometry consisting of a plurality of elements, the second stoichiometry consisting of the plurality of elements;
• providing a plurality of circuit elements, the first portion of the plurality of connective components being connected to a first portion of the plurality of circuit elements, the second portion of the plurality of connective components being connected to a second portion of the plurality of circuit elements such that the first portion of the plurality of circuit elements are active and the second portion of the plurality of circuit elements are inactive;
• and
• providing an insulator adjacent to at least a portion of each of the plurality of connective components.