Semiconductor package with embedded MIM capacitor, and method of fabricating thereof

A method of fabricating a semiconductor package, comprising:

• forming a single layer of organic material on a first redistribution layer comprising an interconnect structure;
• embedding a capacitor in the single layer of organic material, the capacitor extending between two opposing surfaces of the single layer of organic material and comprising a first electrode, a second electrode, and a capacitor dielectric between the first electrode and the second electrode, the first electrode directly electrically connecting with a surface of the interconnect structure of the first redistribution layer at one of the two opposing surfaces of the single layer of organic material;
• forming a single hard mask having a surface directly on another of the two opposing surfaces of the single layer of organic material;
• embedding a first continuous conductive pillar in and extending through the single layer of organic material and the single hard mask to directly electrically connect the first continuous conductive pillar with the interconnect structure of the first redistribution layer at the one of the two opposing surfaces of the single layer of organic material;
• forming a second redistribution layer comprising an interconnect structure having a surface directly on a surface of the single hard mask opposite the surface of the single hard mask on the another of the two opposing surfaces of the single layer of organic material to electrically connect with the second electrode at the surface of the single hard mask opposite the surface thereof on the another of the two opposing surfaces of the single layer of organic material through a second continuous conductive pillar extending from the second electrode through the single hard mask between the surface thereof directly on the another of the two opposing surfaces of the single layer of organic material, and the interconnect structure of the second redistribution layer directly electrically connecting with the first continuous conductive pillar at the surface of the single hard mask on the another of the two opposing surfaces of the single layer of organic material;
• forming a microbump through a passivation layer on a surface of the first redistribution layer opposite the single layer of organic material to electrically connect with the interconnect structure of the first redistribution layer;
• and
• connecting a chip with the microbump.