Semiconductor device package including filling mold via
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsJen-Chieh Kao, Chang-Lin Yeh, Yi Chen, Sung-Hung Chiang
Life of this patent
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Abstract
A semiconductor device package includes a substrate, a package body, a via and an interconnect. The substrate includes a surface and a pad on the first surface. The package body covers at least a portion of the surface of the substrate. The via is disposed in the package body and includes a conductive layer and a first intermediate layer. The conductive layer is electrically connected with the pad. The first intermediate layer is adjacent to the conductive layer. The interconnect is disposed on the first intermediate layer.
Claims26
A semiconductor device package, comprising:
- a substrate comprising a dielectric material, a surface and a pad on the surface;
- a package body covering at least a portion of the surface of the substrate;
- a via disposed in the package body, the via comprising:
- a conductive layer electrically connected with the pad and comprising a first material;
- and
- a first intermediate layer adjacent to the conductive layer and comprising a second material;
- and
- an interconnect disposed on the first intermediate layer,
- wherein a melting temperature of the second material is higher than a melting temperature of the first material.
A semiconductor device package, comprising:
- a substrate comprising a surface and a pad on the surface;
- an electrical component disposed on the substrate;
- a package body covering at least a portion of the surface of the substrate;
- a via disposed in the package body, the via comprising:
- a conductive layer electrically connected with the pad and comprising a first material;
- and
- a first intermediate layer adjacent to the conductive layer and comprising a second material;
- and
- an interconnect disposed on the first intermediate layer,
- wherein a portion of the interconnect is embedded in the package body,
- and a melting temperature of the second material is higher than a melting temperature of the first material.
A semiconductor device package, comprising:
- a substrate comprising a surface and a pad on the surface;
- an electrical component disposed on the substrate;
- a package body covering at least a portion of the surface of the substrate and comprising a surface opposite to the surface of the substrate;
- a conductive via disposed in the package body, wherein the conductive via is electrically connected with the pad and penetrates through the package body and comprises a first material;
- a first intermediate layer protruding from the surface of the package body, wherein the first intermediate layer directly contacts with and is electrically connected with the conductive via and comprises a second material;
- and
- an interconnect disposed on the first intermediate layer,
- wherein a melting temperature of the second material is higher than a melting temperature of the first material.
Dependencies are inferred from the claim text.