Package-on-package semiconductor assemblies and methods of manufacturing the same

A method of forming a package-on-package semiconductor assembly, comprising:

• providing a base substrate having a first side with a die-attach region and an interconnect region, a second side, and an interconnect assembly having a plurality of conductive interconnects that extend from the interconnect region of the first side, wherein the interconnect assembly comprises first and second interconnect structures, and wherein the first interconnect structure has a first stratum of matrix material and a plurality of first interconnect segments arranged in an interconnect pattern, and wherein the second interconnect structure is on the first interconnect structure, and wherein the second interconnect structure has a second stratum of matrix material and a plurality of second interconnect segments arranged in the interconnect pattern such that individual second interconnect segments are aligned with corresponding individual first interconnect segments;
• mounting a first semiconductor die to the base substrate at the die-attach region such that the first semiconductor die is electrically coupled to the base substrate, wherein the interconnects are at the interconnect region of the base substrate before the first semiconductor die is mounted to the die-attach region of the base substrate;
• and
• electrically coupling a second semiconductor device package to the conductive interconnects, wherein the second semiconductor device package has at least one second semiconductor die electrically coupled to an interposer substrate.