Three-dimensional memory device with straddling drain select electrode lines and method of making thereof

A three-dimensional memory device comprising:

• an alternating stack of insulating layers and electrically conductive layers located over a substrate;
• an insulating cap layer overlying the alternating stack;
• memory stack structures arranged in rows that laterally extend along a first horizontal direction and extending through each layer of the alternating stack and the insulating cap layer, wherein each of the memory stack structures comprises a memory film and a vertical semiconductor channel laterally surrounded by the memory film;
• a line trench straddling a neighboring pair of rows of the memory stack structures and extending along the first horizontal direction, wherein sidewalls of the line trench comprise a sidewall of each memory stack structure within the neighboring pair of rows of the memory stack structures;
• and
• a drain select electrode line located within the line trench;
• wherein:
• each vertical semiconductor channel contacts a bottom surface of a respective drain region;
• each drain region contacts a respective memory film;
• a drain select gate dielectric contacting at least one of the sidewalls of the line trench and a bottom surface of the line trench, wherein the drain select electrode line contacts the drain select gate dielectric;
• and
• the vertical semiconductor channel comprises an L-shaped doped region having a doping of an opposite conductivity type from a conductivity type of the drain regions and contacting a sidewall and a bottom surface of the drain select gate dielectric.