Multilayer composite bonding materials and power electronics assemblies incorporating the same

A power electronics assembly for transient liquid phase bonding comprising:

• a semiconductor device extending across a metal substrate;
• and
• a multilayer composite bonding material comprising thermal stress compensation layers sandwiched between a pair of bonding layers and that is transient liquid phase (TLP) bonded to the semiconductor device and the metal substrate, the thermal stress compensation layers comprising a first core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness, wherein the pair of outer layers with the second stiffness is sandwiched between a pair of second core layers with one of the first stiffness and a third stiffness, the third stiffness different from the first stiffness and the second stiffness, such that a graded stiffness extends across a thickness of the thermal stress compensation layers;
• wherein the thermal stress compensation layers each have a melting point above a TLP sintering temperature, and the pair of bonding layers each have a melting point below the TLP sintering temperature, the TLP sintering temperature being in a range between about 280° C. and 350° C.

A process for manufacturing a power electronics assembly through transient liquid phase bonding comprising:

• positioning a multilayer composite bonding material between a metal substrate and a semiconductor device to provide a metal substrate/semiconductor device assembly, the multilayer composite bonding material comprising thermal stress compensation layers sandwiched between a pair of bonding layers, the thermal stress compensation layers comprising a first core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness, wherein the pair of outer layers with the second stiffness is sandwiched between a pair of second core layers with one of the first stiffness and a third stiffness, the third stiffness different from the first stiffness and the second stiffness, such that a graded stiffness is present across a thickness of the thermal stress compensation layers;
• heating the metal substrate/semiconductor device assembly to a transient liquid phase (TLP) sintering temperature between about 280° C. and 350° C., wherein the pair of bonding layers each have a melting point less than the TLP sintering temperature and the thermal stress compensation layers each have a melting point greater than the TLP sintering temperature such that the pair of bonding layers at least partially melt and form a TLP bond with the metal substrate and the semiconductor device;
• and
• cooling the power electronics assembly from the TLP sintering temperature to ambient temperature, wherein the multilayer composite bonding material with the graded stiffness compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the TLP sintering temperature to ambient temperature.