Back to results
US 10,381,056 B2Granted
Dual port static random access memory (DPSRAM) cell
AssigneeUnited Microelectronics Corp.
InventorsTien-Yu Lu, Chun-Hsien Huang, Ching-Cheng Lung, Yu-Tse Kuo, Shou-Sian Chen, Koji Nii, Yuichiro Ishii
Life of this patent
Estimating the term…
Abstract
A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.
Claims28
A dual port static random access memory cell, comprising:
- a first power line disposed between a first word line and a second word line;
- a first bit line disposed between the first word line and the first power line;
- a second bit line disposed between the second word line and the first power line, wherein the first power line, the first word line, the second word line, the first bit line and the second bit line constitute a first group;
- a symmetric first power line disposed between a symmetric first word line and a symmetric second word line;
- a first bit line bar disposed between the symmetric first word line and the symmetric first power line;
- a second bit line bar disposed between the symmetric second word line and the symmetric first power line, wherein the symmetric first power line, the symmetric first word line, the symmetric second word line, the first bit line bar and the second bit line bar constitute a second group;
- and
- a second power line disposed between the first group and the second group, wherein the symmetric first power line, the symmetric first word line, the symmetric second word line, the first bit line bar and the second bit line bar are mirror symmetric to the first power line, the first word line, the second word line, the first bit line and the second bit line by the second power line.
5 more elements
A dual port static random access memory cell, comprising:
- a first bit line and a second bit line disposed between a first word line and a second word line, wherein the first bit line is next to the first word line, and the second bit line is next to the second word line;
- two first power lines disposed between the first word line and the first bit line, and between the second word line and the second bit line respectively, wherein the first bit line, the second bit line, the first word line, the second word line and the two first power lines constitute a first group;
- a first bit line bar and a second bit line bar disposed between a symmetric first word line and a symmetric second word line, wherein the first bit line bar is next to the symmetric first word line, and the second bit line bar is next to the symmetric second word line;
- two symmetric first power lines disposed between the first bit line bar and the symmetric first word line, and between the second bit line bar and the symmetric second word line, wherein the first bit line bar, the second bit line bar, the symmetric first word line, the symmetric second word line and the two symmetric first power lines constitute a second group;
- and
- a second power line disposed between the first group and the second group, wherein the first bit line bar, the second bit line bar, the symmetric first word line, the symmetric second word line and the two symmetric first power lines are mirror symmetric to the first bit line, the second bit line, the first word line, the second word line and the first power lines by the second power line.
3 more elements
Dependencies are inferred from the claim text.