Overvoltage protection for a fine grained negative wordline scheme
AssigneeInternational Business Machines Corporation
InventorsHarold Pilo, Richard S. Wu
Life of this patent
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Abstract
A fine grained negative wordline scheme for SRAM memories is disclosed. The scheme includes a circuit having a static random access memory (SRAM) cell including at least a wordline coupled to a plurality of NFETs of a transistor array. The circuit further includes a wordline driver including a plurality of inverters coupled between a wordline group decode node, a power supply and the wordline. Overvoltage on the wordline driver and NFETs of the SRAM cell are eliminated by applying a power gating mode and lowering the power supply voltage.
Claims19
A method comprising providing a negative voltage to a wordline of an SRAM cell during a power gating mode, wherein a wordline pulldown network is coupled to a wordline group decode node to control operation of a first control device of the wordline pulldown network for allowing or preventing the negative voltage from passing to a node of the wordline pulldown network, and wherein the negative voltage is only applied to the wordline when a positive supply voltage is lowered.
A method comprising providing a negative voltage to a wordline of an SRAM cell during a power gating mode, wherein a wordline pulldown network is coupled to a wordline group decode node to control operation of a first control device of the wordline pulldown network for allowing or preventing the negative voltage from passing to a node of the wordline pulldown network, wherein the negative voltage is only applied to the wordline when power gating is turned on.
A method comprising providing a negative voltage to a wordline of an SRAM cell during a power gating mode, wherein a wordline pulldown network is coupled to a wordline group decode node to control operation of a first control device of the wordline pulldown network for allowing or preventing the negative voltage from passing to a node of the wordline pulldown network, further comprising a wordline driver, wherein the wordline driver and the SRAM are coupled to a power gating voltage circuit, wherein the power gating voltage circuit is comprised of a FET, and wherein a control gate of the FET of the power gating voltage circuit is coupled to the wordline group decode node.
A method comprising providing a negative voltage to a wordline of an SRAM cell during a power gating mode, wherein a wordline pulldown network is coupled to a wordline group decode node to control operation of a first control device of the wordline pulldown network for allowing or preventing the negative voltage from passing to a node of the wordline pulldown network, wherein:
- the negative voltage is applied to the wordline to eliminate an overvoltage on an NFET device coupled to the wordline of the SRAM, and
- a wordline driver is coupled to the wordline and to the node of the wordline pulldown network.
Dependencies are inferred from the claim text.