Quantum computing assemblies
AssigneeIntel Corporation
InventorsAdel A. Elsherbini, Javier A. Falcon, Hubert C. George, Shawna M. Liff, James S. Clarke
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Abstract
Quantum computing assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a quantum computing assembly may include a plurality of dies electrically coupled to a package substrate, and lateral interconnects between different dies of the plurality of dies, wherein the lateral interconnects include a superconductor, and at least one of the dies of the plurality of dies includes quantum processing circuitry.
Claims25
A quantum computing assembly, comprising:
- a package substrate having a first surface and an opposing second surface;
- a first die having a first surface and an opposing second surface, wherein the first surface of the first die is coupled to the second surface of the package substrate by first interconnects, and the first surface of the first die is at least partially between the second surface of the package substrate and the second surface of the first die;
- and
- a second die having a first surface and an opposing second surface, wherein the first surface of the second die is coupled to the second surface of the package substrate by second interconnects, and the first surface of the second die is at least partially between the second surface of the package substrate and the second surface of the second die;
- wherein the first die or the second die includes quantum processing circuitry, and the first die is coupled to the second die by lateral interconnects;
- and
- wherein (1) at least one of the lateral interconnects couples the second surface of the first die to the second surface of the second die, and the first die includes qubit elements located closer to the second surface of the first die than to the first surface of the first die;
- or (2) at least one of the lateral interconnects couples the first surface of the first die to the first surface of the second die, and the first die includes qubit elements located closer to the first surface of the first die than to the second surface of the first die.
A quantum computing assembly, comprising:
- a package substrate having a first surface and an opposing second surface;
- a first die having a first surface and an opposing second surface, wherein the second surface of the first die is coupled to the second surface of the package substrate by first interconnects, and the first surface of the first die is at least partially between the second surface of the package substrate and the second surface of the first die;
- and
- a second die having a first surface and an opposing second surface, wherein the second surface of the second die is coupled to the second surface of the package substrate by second interconnects, and the first surface of the second die is at least partially between the second surface of the package substrate and the second surface of the second die;
- wherein the first die or the second die includes quantum processing circuitry, and the first die is coupled to the second die by lateral interconnects;
- and
- wherein (1) at least one of the lateral interconnects couples the second surface of the first die to the second surface of the second die, and the first die includes qubit elements located closer to the second surface of the first die than to the first surface of the first die;
- or (2) at least one of the lateral interconnects couples the first surface of the first die to the first surface of the second die, and the first die includes qubit elements located closer to the first surface of the first die than to the second surface of the first die.
A quantum computing assembly, comprising:
- a plurality of dies electrically coupled to a surface of a package substrate;
- and
- lateral interconnects between different dies of the plurality of dies;
- wherein the lateral interconnects include a superconductor, at least one of the dies of the plurality of dies includes quantum processing circuitry, and the surface of the package substrate includes one or more cavities.
A quantum computing assembly, comprising:
- a package substrate having a first surface and an opposing second surface;
- a first die having a first surface and an opposing second surface, wherein the first die is coupled to the second surface of the package substrate by first interconnects, and the first surface of the first die is at least partially between the second surface of the package substrate and the second surface of the first die;
- and
- a second die having a first surface and an opposing second surface, wherein the second die is coupled to the second surface of the package substrate by second interconnects, and the first surface of the second die is at least partially between the second surface of the package substrate and the second surface of the second die;
- wherein the first die or the second die includes quantum processing circuitry, the first die is coupled to the second die by lateral interconnects, and the second surface of the package substrate includes one or more cavities.
Dependencies are inferred from the claim text.