US 10,380,300 B1Granted

Flexible power query interfaces and infrastructures

AssigneeMentor Graphics Corporation

InventorsNikhil Tripathi, Vishnu Kanwar, Manish Kumar, Srihari Yechangunja

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Abstract

Disclosed below are representative embodiments of methods, apparatus, and systems for performing power analysis during the design and verification of a circuit. Certain exemplary embodiments include user interfaces and software infrastructures that provide a flexible and powerful environment for performing power analysis. For example, embodiments of the disclosed technology can be used to construct complex and targeted power queries that quickly provide a designer with power information during a circuit design process. The disclosed methods can be implemented by a software tool (e.g., a power analysis tool or other EDA tool) that computes and reports power characteristics in a circuit design (e.g., a system-on-a-chip design or other integrated design).

Claims14

Dependent claims

A method for power analysis of a circuit design using a chained set of contexts, comprising:

by a computer:
receiving a first power context for a power analysis query from a user;
receiving a second power context for a power analysis query from the user;
receiving a request from the user to combine the first power context with the second power context into a chained set of contexts for use in a single power analysis query of a circuit design;
combining the first power context with the second power context into the chained set of contexts;
and
analyzing the single power analysis query of the circuit design by one or more power analysis engines, the single power analysis query comprising the chained set of contexts;
wherein the first power context and the second power context, combined in the chained set of contexts used in the single power analysis query of the circuit design, respectively comprise distinct ones of:
(a) a specification of a power mode or time of interest for the circuit design;
(b) a specification of components in the circuit design;
(c) a specification of one or more new components not currently in the circuit design;
or (d) a specification of a power intent for the circuit design.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/951,293Filed 24 Nov 2015 · division
Priority: 13 Mar 2013
Granted: 13 Aug 2019
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

G06F 30/3308
Design verification, e.g. functional simulation or model checking: using simulation
G06F 30/30
Computer-aided design [CAD]: circuit design
G06F 30/327
Circuit design at the digital level: logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
G06F 30/33
Circuit design at the digital level: design verification, e.g. functional simulation or model checking