Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator

A method comprising:

• decoding an instruction with a decoder of a core of a processor into a decoded instruction;
• executing the decoded instruction with an execution unit of the core of the processor to perform a first operation;
• receiving an input of a dataflow graph comprising a plurality of nodes forming a loop construct;
• overlaying the dataflow graph into a plurality of processing elements of the processor and an interconnect network between the plurality of processing elements of the processor with a first node of the plurality of nodes represented as a first dataflow operator and a second node of the plurality of nodes represented as a second dataflow operator in the interconnect network and the plurality of processing elements, and the first dataflow operator and the second dataflow operator are controlled by a sequencer dataflow operator;
• and
• performing a second operation of the dataflow graph with the interconnect network and the plurality of processing elements by a respective, incoming operand set arriving at the first dataflow operator and the second dataflow operator and the sequencer dataflow operator generating control values for the first dataflow operator and the second dataflow operator.

A non-transitory machine readable medium that stores code that when executed by a machine causes the machine to perform a method comprising:

• decoding an instruction with a decoder of a core of a processor into a decoded instruction;
• executing the decoded instruction with an execution unit of the core of the processor to perform a first operation;
• receiving an input of a dataflow graph comprising a plurality of nodes forming a loop construct;
• overlaying the dataflow graph into a plurality of processing elements of the processor and an interconnect network between the plurality of processing elements of the processor with a first node of the plurality of nodes represented as a first dataflow operator and a second node of the plurality of nodes represented as a second dataflow operator in the interconnect network and the plurality of processing elements, and the first dataflow operator and the second dataflow operator are controlled by a sequencer dataflow operator;
• and
• performing a second operation of the dataflow graph with the interconnect network and the plurality of processing elements by a respective, incoming operand set arriving at the first dataflow operator and the second dataflow operator and the sequencer dataflow operator generating control values for the first dataflow operator and the second dataflow operator.