Processor core to coprocessor interface with FIFO semantics
AssigneeOracle International Corporation
InventorsDavid A. Brown, Daniel Fowler, Rishabh Jain, Erik Schlanger, Michael Duller
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Abstract
Techniques are provided for exchanging dedicated hardware signals to manage a first-in first-out (FIFO). In an embodiment, a first processor initiates content transfer into the FIFO. The first processor activates a first hardware signal that is reserved for indicating that content resides within the FIFO. A second processor activates a second hardware signal that is reserved for indicating that content is accepted. The second hardware signal causes the first hardware signal to be deactivated. This exchange of hardware signals demarcates a FIFO transaction, which is mediated by interface circuitry of the FIFO.
Claims20
A method comprising:
- sending, by a first processor, a first hardware signal that indicates that content is available for appending onto a first-in first-out (FIFO);
- in response to said sending said first hardware signal, transferring said content from a memory that is shared by said first processor and a second processor into said FIFO;
- after said transferring said content, sending, by said second processor, a second hardware signal that indicates that said content is transferred into said FIFO;
- wherein said second hardware signal causes said first hardware signal to terminate.
One or more non-transitory computer-readable media storing instructions that, when executed by one or more processors, cause:
- sending, by a first processor, a first hardware signal that indicates that content is available for appending onto a first-in first-out (FIFO);
- in response to said sending said first hardware signal, transferring said content from a memory that is shared by said first processor and a second processor into said FIFO;
- after said transferring said content, sending, by said second processor, a second hardware signal that indicates that said content is transferred into said FIFO;
- wherein said second hardware signal causes said first hardware signal to terminate.
Dependencies are inferred from the claim text.