Folded memory modules
AssigneeRambus Inc.
InventorsAmir Amirkhany, Suresh Rajan, Ravindranath Kollipara, Ian Shaeffer, David A. Secker
Life of this patent
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Abstract
A memory module comprises a data interface including a plurality of data lines and a plurality of configurable switches coupled between the data interface and a data path to one or more memories. The effective width of the memory module can be configured by enabling or disabling different subsets of the configurable switches. The configurable switches may be controlled by manual switches, by a buffer on the memory module, by an external memory controller, or by the memories on the memory module.
Claims17
A memory module comprising:
- a plurality of memory devices to store data in response to a write command and to output data in response to a read command, wherein the plurality of memory devices comprises at least a first memory device and a second memory device;
- a plurality of data pins including at least a first group of data pins and a second group of data pins;
- a first microbuffer to route data between the first group of data pins and one of the first memory device and the second memory device;
- a second microbuffer to route data between the second group of data pins and one of the first memory device and the second memory device;
- a first plurality of configurable switches coupled between the first group of data pins and the first microbuffer, each of the first plurality of configurable switches controllable to enable or disable a coupling between respective pins of the first group of data pins and the first microbuffer;
- a second plurality of configurable switches coupled between the second group of data pins and the second microbuffer, each of the second plurality of configurable switches controllable to enable or disable a coupling between respective pins of the second group of data pins and the second microbuffer;
- and
- a central buffer to provide control signals to control routing of the first microbuffer and the second microbuffer in response to the write command or the read command.
A memory module comprising:
- a plurality of memory means for storing data in response to a write command and to output data in response to a read command, wherein the plurality of memory means comprises at least a first memory means and a second memory means;
- a plurality of input/output means for communicating data externally to the memory module, the plurality of input/output means including at least a first group of input/output means and a second group of input/output means;
- a first buffering means for routing data between the first group of input/output means and one of the first memory means and the second memory means;
- a second buffering means for routing data between the second group of input/output pins and one of the first memory means and the second memory means;
- a first plurality of configurable switching means coupled between the first group of input/output means and the first buffering means, each of the first plurality of configurable switching means controllable for enabling or disabling a coupling between respective input/output means of the first group of input/output means and the first buffering means;
- a second plurality of configurable switching means coupled between the second group of input/output means and the second buffering means, each of the second plurality of configurable switching means controllable for enabling or disabling a coupling between respective input/output means of the second group of input/output means and the second buffering means;
- and
- a central buffering means for providing for control signals to control routing of the first buffering means and the second buffering means in response to the write command or the read command.
A method for operating a memory module comprising:
- storing, by a plurality of memory devices, data in response to a write command and outputting, by the plurality of memory devices, data in response to a read command, wherein the plurality of memory devices comprises at least a first memory device and a second memory device;
- routing, by a first microbuffer, data between a first group of data pins and one of the first memory device and the second memory device;
- routing, by a second microbuffer, data between a second group of data pins and one of the first memory device and the second memory device;
- controlling a first plurality of configurable switches coupled between the first group of data pins and the first microbuffer to enable or disable a coupling between respective pins of the first group of data pins and the first microbuffer;
- controlling a second plurality of configurable switches coupled between the second group of data pins and the second microbuffer to enable or disable a coupling between respective pins of the second group of data pins and the second microbuffer;
- and
- providing, by a central buffer, control signals to control routing of the first microbuffer and the second microbuffer in response to the write command or the read command.
Dependencies are inferred from the claim text.