US 10,380,015 B2 · Logical address range mapping for storage devices

Abstract

Apparatus, systems, methods, and computer program products are disclosed for logical address range mapping for storage devices. A system includes a set of non-volatile memory elements accessible using a set of physical addresses. A system includes a controller for a set of non-volatile memory elements. A controller is configured to maintain a hierarchical data structure comprising a plurality of levels for mapping logical addresses to a set of physical address. A controller is configured to receive an input/output (I/O) request. A controller is configured to translate a logical address for an I/O request to a physical address utilizing a largest mapped logical address range that includes the logical address in a hierarchical data structure. A level includes one or more mappings between logical address ranges and physical address ranges at a range size for the level.

Claims20

Dependent claims

A system comprising:

a set of non-volatile memory elements accessible using a set of physical addresses;
and
a controller for the set of non-volatile memory elements, the controller configured to:
maintain a hierarchical data structure comprising a plurality of levels for mapping logical addresses to the set of physical addresses, each of the levels comprising one or more mappings between logical address ranges and physical address ranges at a range size for the plurality of levels;
receive an input/output (I/O) request;
and
translate a logical address for the I/O request to a physical address utilizing a largest mapped logical address range that includes the logical address in the hierarchical data structure.

4 more elements

An apparatus comprising:

means for maintaining a hierarchical data structure comprising a plurality of levels for mapping logical addresses to a set of physical addresses, each of the levels comprising one or more mappings between logical address ranges and physical address ranges at a range size for the plurality of levels;
means for receiving an input/output (I/O) request;
and
means for translating a logical address for the I/O request to a physical address utilizing a largest mapped logical address range that includes the logical address in the hierarchical data structure.

1 more element

A method comprising:

maintaining a hierarchical data structure comprising a plurality of levels for mapping logical addresses to a set of physical addresses, each of the levels comprising one or more mappings between logical address ranges and physical address ranges at a range size for the plurality of levels;
receiving an input/output (I/O) request;
and
translating a logical address for the I/O request to a physical address utilizing a largest mapped logical address range that includes the logical address in the hierarchical data structure.

1 more element

Dependencies are inferred from the claim text.

Logical address range mapping for storage devices

Life of this patent

Logical address range mapping for storage devices

Life of this patent

Abstract

Claims20