Maintaining IO block operation in electronic systems for board testing
AssigneeIntel Corporation
InventorsLakshminarayana Pappu, James J. Grealish
Life of this patent
Estimating the term…
Abstract
Embodiments are generally directed to maintaining IO block operation in electronic systems for board testing. An embodiment of a system includes a processor; a power management block for the system; a plurality of IO (input/output) blocks; a read only memory for storage of firmware for the processor. The system is to provide support for a board-level test of the system including testing of one or more IO blocks of the plurality of IO blocks; and the firmware includes elements to stall a reset sequence of the system including the system branching to a mode that maintains power to the one or more IO blocks.
Claims21
A system comprising:
- a power management block for the system;
- a plurality of IO (input/output) blocks;
- and
- a read only memory for storage of firmware;
- wherein the system provides support for a board-level test of the system including testing of one or more IO blocks of the plurality of IO blocks;
- and
- wherein the firmware includes elements to stall a reset sequence of the system including the system to branch to a mode that maintains power to the one or more IO blocks, wherein the mode is a semi-sleep mode.
A non-transitory computer-readable storage medium having stored thereon data representing sequences of instructions that, when executed by a processor, cause the processor to perform operations comprising:
- initiating a reset sequence for a system;
- bringing up power rails for the system and issuing signals indicating stability of the power rails;
- in response to assertion of an external bootstrap and receipt of an instruction for a board level test, stalling the reset sequence, wherein stalling the reset sequence includes branching to a first mode to retain power to a plurality of IO (input/output) blocks;
- performing a board test of the system, the board test including testing of the plurality of IO blocks;
- in response to a de-assertion of the external bootstrap, exiting the first mode;
- and
- returning to the reset sequence for the system;
- wherein the stalling of the reset sequence is in response to elements of firmware for the system.
A computing system comprising:
- one or more processors;
- main memory including dynamic random access memory (DRAM);
- a power management block for the system;
- a plurality of IO (input/output) blocks;
- and
- a read only memory for storage of firmware for the one or more processors;
- wherein the system provides support for a board-level test of the system including testing of one or more IO blocks of the plurality of IO blocks;
- and
- wherein the firmware includes hooks to stall a reset sequence of the computing system including the system to branch to a mode that maintains power to the one or more IO blocks, wherein the mode is a semi-sleep mode.
A system comprising:
- a power management block for the system;
- a plurality of IO (input/output) blocks;
- and
- a read only memory for storage of firmware;
- wherein the system provides support for a board-level test of the system including testing of one or more IO blocks of the plurality of IO blocks;
- and
- wherein the firmware includes elements to stall a reset sequence of the system including the system to branch to a mode that maintains power to the one or more IO blocks, wherein stalling of the reset sequence includes the system to respond to assertion of a bootstrap, and wherein the system is to return to the reset sequence upon de-assertion of the bootstrap.
A computing system comprising:
- one or more processors;
- main memory including dynamic random access memory (DRAM);
- a power management block for the system;
- a plurality of IO (input/output) blocks;
- and
- a read only memory for storage of firmware for the one or more processors;
- wherein the system provides support for a board-level test of the system including testing of one or more IO blocks of the plurality of IO blocks;
- and
- wherein the firmware includes hooks to stall a reset sequence of the computing system including the system to branch to a mode that maintains power to the one or more IO blocks, wherein stalling of the reset sequence includes the system responding to assertion of a bootstrap, and wherein the computing system is to return to the reset sequence upon de-assertion of the bootstrap.
Dependencies are inferred from the claim text.