Power fail handling using stop commands
AssigneeWestern Digital Technologies, Inc.
InventorsYungLi Ji, Yuriy Pavlenko, Kum-Jung Song
Life of this patent
Estimating the term…
Abstract
A device that provides power fail handling using command suspension includes non-volatile memory circuits and a controller that is configured to determine that a power fail event has occurred. The controller is configured to determine, in response to the determination that the power fail event has occurred, which of the non-volatile memory circuits are executing a first type of memory commands. The controller is also configured to issue a stop command to the determined non-volatile memory circuits to stop execution of the first type of memory commands.
Claims21
A data storage device comprising:
- non-volatile memory circuits;
- and
- a controller configured to:
- determine that a power fail event has occurred;
- determine, in response to the determination that the power fail event has occurred, which of the non-volatile memory circuits are executing a first type of memory commands;
- and
- issue a stop command to the determined non-volatile memory circuits to stop execution of the first type of memory commands.
A system comprising:
- a plurality of flash memory circuits;
- a random access memory (RAM);
- and
- a controller communicatively coupled to the plurality of flash memory circuits, the controller configured to:
- determine that a power fail event has occurred;
- determine, in response to the determination that the power fail event has occurred, which of the plurality of flash memory circuits are executing an erase command or a program command;
- and
- stop execution of either the erase command or the program command based on a stop command being issued to the determined flash memory circuits.
A method comprising:
- determining that a power fail event has occurred;
- determining, in response to the determination that the power fail event has occurred, which flash memory circuits in a data storage device are executing an erase command or a program command;
- and
- issuing a stop command to the determined flash memory circuits to terminate the erase command or to suspend the program command.
A system comprising:
- means for determining that a power fail event has occurred in flash storage;
- means for determining, in response to the determination that the power fail event has occurred, which flash memory circuits in the flash storage are executing an erase command or a program command;
- and
- means for issuing a stop command to the determined flash memory circuits to terminate the erase command or to suspend the program command.
Dependencies are inferred from the claim text.