Method and device for monitoring data error status in a memory
AssigneeMacronix International Co., Ltd.
InventorsKuen Long Chang, Ken Hui Chen, Su Chueh Lo, Chia-Feng Cheng
Life of this patent
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Abstract
A method for monitoring data error status of a memory device includes generating, by a memory controller, a data status indication code indicating error status of a data chunk transmitted by the memory controller and outputting, by the memory controller, the data status indication code to a user interface.
Claims17
A method for monitoring data error status of a memory device, comprising:
- generating, by a memory controller, a data status indication code indicating error status of a data chunk transmitted by the memory controller;
- and
- outputting, by the memory controller, the data status indication code to a user interface during a portion of a correctable data period,
- wherein
- the data status indication code includes two bits;
- the data status indication code indicates at least one of:
- a number of fail bits in the data chunk,
- a location of fail bits in the data chunk, or
- a threshold voltage of a memory cell in the memory device that stores the fail bits;
- and
- outputting the data status indication code includes outputting the two bits to the user interface through at least two respective external status pins, the two external status pins being different from a data bus pin for outputting the data chunk.
A method for monitoring data error status of a memory device that includes a serial flash memory, the method comprising:
- generating, by a memory controller, a data status indication code that includes two bits indicating error status of a data chunk transmitted by the memory controller;
- and
- outputting, by the memory controller, the data status indication code to a user interface,
- wherein outputting the data status indication code includes:
- combining the data status indication code with the data chunk to generate an output signal;
- and
- outputting the output signal to a data bus pin by
- outputting the data chunk and the data status indication code in a plurality of clock cycles;
- outputting a first one of the two bits during a next-to-last clock cycle of the plurality of clock cycles;
- and
- outputting a second one of the two bits during a last clock cycle of the plurality of clock cycles.
A method for monitoring data error status of a memory device, comprising:
- generating, by a memory controller, a plurality of data status indication codes, each of which corresponding to one of a plurality of data chunks being transmitted sequentially by the memory controller;
- and
- outputting, by the memory controller, the data status indication code to a user interface,
- wherein
- the data status indication code includes two bits;
- generating the data status indication code includes generating a code indicating at least one of:
- a number of fail bits in the data chunk,
- a location of fail bits in the data chunk, or
- a threshold voltage of a memory cell in the memory device that stores the fail bits;
- and
- outputting the data status indication code includes:
- receiving a user command to output one of the plurality of data status indication codes that corresponds to one of the plurality of data chunks, and
- outputting the two bits to the user interface through at least one external status pin sequentially after receiving the user command, the at least one external status pin being different from a data bus pin for outputting the data chunks.
Dependencies are inferred from the claim text.