Multicopy atomic store operation in a data processing system

A design structure tangibly embodied in a machine-readable storage device for designing, manufacturing, or testing an integrated circuit, the design structure comprising:

• a processing unit for a data processing system implementing a weak memory model, the processing unit including:
• a processor core that executes a multicopy atomic store instruction;
• a read-claim machine configured to perform:
• responsive to execution of the multicopy atomic store instruction, broadcasting a store request on an interconnect fabric of the data processing system to a plurality of processing units in the data processing system to obtain coherence ownership of a target cache line of the multicopy atomic store instruction;
• posting a kill request to at least one of the plurality of processing units to request invalidation of a copy of the target cache line by said at least one of the plurality of processing units;
• in response to successful posting of the kill request, broadcasting a store complete request on the interconnect fabric to enforce completion of the invalidation of the copy of the target cache line by the said at least one of the plurality of processing units;
• and
• in response to the store complete request receiving a coherence response indicating success, permitting an update to the target cache line requested by the multicopy atomic store instruction to be visible to all of the plurality of processing units.