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US 10,379,852 B2Granted
Apparatuses for integrating arithmetic with logic operations
AssigneeVia Alliance Semiconductor Co., Ltd.
InventorsHuaisheng Zhang, Dacheng Liang, Boming Chen, Renyu Bian
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Abstract
An apparatus for integrating arithmetic with logic operations contains at least a calculation device and a post-logic unit. The calculation device calculates source data to generate and output first destination data. The post-logic unit, coupled to the calculation device, performs a comparison operation for comparing the first destination data with 0 and outputs a comparison result.
Claims11
An apparatus for integrating arithmetic with logic operations, comprising:
- a calculation device, calculating source data to generate and output first destination data;
- and
- a post-logic unit, coupled to the calculation device, performing a comparison operation for comparing the first destination data with 0, and outputting a comparison result;
- wherein the post-logic unit is coupled to the calculation device via a delay circuit,
- wherein the calculation device generates and outputs the first destination data at one cycle,
- wherein the post-logic unit performs the comparison operation for comparing the first destination data with 0 and outputs the comparison result at the next cycle.
3 more elements
Dependencies are inferred from the claim text.