Host managed solid state drivecaching using dynamic write acceleration
AssigneeIntel Corporation
InventorsSuresh Nagarajan, Sriram Natarajan, Shankar Natarajan, Jason B. Akers
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AssigneeIntel Corporation
InventorsSuresh Nagarajan, Sriram Natarajan, Shankar Natarajan, Jason B. Akers
Estimating the term…
Systems, apparatuses and methods may provide for technology that writes a block of data addressed within a host managed cache region into a set of multi-level non-volatile memory (NVM) cells organized into a dynamic single level cell buffer region, that writes a block of data addressed outside the host managed cache region into the set of multi-level NVM cells organized into a static single level cell buffer region, and automatically writes the contents of the static single level cell buffer region into the dynamic multi-level NVM media region. The host manage cache region comprises a set of dynamic single level NVM cells within the dynamic multi-level NVM media region, and the multi-level NVM cells are to be dynamically convertible into and from single NVM cells.
A system comprising:
An apparatus comprising:
A method comprising:
Dependencies are inferred from the claim text.