Scan chain stitching for test-per-clock
AssigneeMentor Graphics Corporation
InventorsJanusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski
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AssigneeMentor Graphics Corporation
InventorsJanusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski
Estimating the term…
Various aspects of the present invention relate to scan chain stitching techniques for test-per-clock. With various implementations of the invention, a plurality of scan cell partitions are generated based on combinational paths between scan cells. Scan cells may be assigned to one or more pairs of scan cell partitions based on combinational paths between the scan cells. Each pair of the scan cell partitions comprises one stimuli partition and one compacting partition. Using the plurality of scan cell partitions generated, scan chains are formed based on at least information of combinational paths between scan cell partitions in the plurality of scan cell partitions. The formed scan chains are to be dynamically divided into three groups during a test, which are configured to operate in a shifting-launching mode, a capturing-compacting-shifting mode and a mission mode, respectively.
A method for improved test-per-clock scan testing, executed by at least one processor of an electronic design automation (EDA) computer, comprising:
One or more non-transitory computer-readable media storing computer-executable instructions for causing one or more processors of an electronic design automation (EDA) computer to perform a method, the method comprising:
An electronic design automation (EDA) computing system, comprising:
Dependencies are inferred from the claim text.