# US 10,374,080 B2 · Semiconductor device and method of manufacturing semiconductor device

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- Number: US 10,374,080 B2
- Document ID: US10374080B2
- Status: Granted
- Kind: B2
- Application number: 15/943,696
- Filed: 2018-04-02
- Published: 2018-10-25
- Granted: 2019-08-06
- Earliest claimed: 2017-04-20
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Naoyuki Ohse; Yusuke Kobayashi; Takahito Kojima; Shinsuke Harada
- Web page: https://patentgrep.com/patent/US10374080B2

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 8/60: Schottky-barrier diodes
- H10D 12/031: {of IGBTs}
- H10D 30/0295: {using recessing of the source electrodes}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/64: Electrodes comprising a Schottky barrier to a semiconductor
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

On a front surface of a semiconductor base, an n−-type drift layer, a p-type base layer, an n++-type source region, and a gate trench and a contact trench penetrating the n++-type source region and the p-type base layer and reaching the n−-type drift layer are provided. The contact trench is provided separated from the gate trench. A Schottky metal is embedded in the contact trench and forms a Schottky contact with the n−-type drift layer at a side wall of the contact trench. An ohmic metal is provided at a bottom of the contact trench and forms an ohmic contact with the n−-type drift layer.

## Claims

### Claim 1

A semiconductor device, comprising:
semiconductor substrate of a first conductivity type;
a first semiconductor layer having a first sub-region of the first conductivity type provided on a front surface of the semiconductor substrate;
a second semiconductor layer having a second sub-region of a second conductivity type, the second semiconductor layer provided on a first side of the first semiconductor layer opposite a second side of the first semiconductor layer facing the semiconductor substrate;
a first semiconductor region of the first conductivity type selectively provided in the second semiconductor layer, an impurity concentration of the first semiconductor region being higher than an impurity concentration of the semiconductor substrate;
a first trench penetrating the first semiconductor region and the second semiconductor layer, and reaching the first semiconductor layer;
a gate electrode provided in the first trench, on a gate insulating film;
an interlayer insulating film provided on the gate electrode;
a first electrode in contact with the first semiconductor region and the second semiconductor layer;
a second electrode provided on a rear surface of the semiconductor substrate;
a second trench separated from the first trench, the second trench penetrating the first semiconductor region and the second semiconductor layer, and reaching the first semiconductor layer;
a first metal electrode embedded in the second trench, the first metal electrode forming a Schottky contact with the first semiconductor layer at a side wall of the second trench; and
a second metal electrode forming an ohmic contact with the first semiconductor layer at a bottom of the second trench.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal electrode occupies at least 30% of an internal volume of the second trench.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal electrode is embedded from a bottom of the second trench to at least an interface of the second semiconductor layer and the first semiconductor region.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal electrode protrudes outwardly from the second trench.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein
the first metal electrode protrudes outwardly from the second trench and covers the interlayer insulating film and the first electrode.