# US 10,374,044 B2 · Semiconductor device, inverter circuit, driving device, vehicle, and elevator

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- Number: US 10,374,044 B2
- Document ID: US10374044B2
- Status: Granted
- Kind: B2
- Application number: 16/059,235
- Filed: 2018-08-09
- Published: 2019-06-27
- Granted: 2019-08-06
- Earliest claimed: 2017-12-21
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Ryosuke Iijima; Shinya Kyogoku
- Web page: https://patentgrep.com/patent/US10374044B2

## CPC

- H10D 62/8325: {Silicon carbide}
- H10D 12/031: {of IGBTs}
- H10D 12/038: {having a recessed gate, e.g. trench-gate IGBTs}
- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/153: {Impurity concentrations or distributions}
- H10D 62/157: {Impurity concentrations or distributions}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 64/01: Manufacture or treatment
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/518: {characterised by their lengths or sectional shapes}
- H10P 14/3408: {Silicon carbide}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device of an embodiment includes a silicon carbide layer having a first plane and a second plane; a trench having a first side face, a second side face, and a bottom face; a first silicon carbide region of a first conductivity type; a second silicon carbide region and a third silicon carbide region of a second conductivity type, the third silicon carbide region and the second silicon carbide region sandwiching the trench; a sixth silicon carbide region of a second conductivity type in contact with the second side face and the bottom face; and a gate electrode in the trench. The first side face has a first region having a first inclination angle. The off angle of the first region with respect to a {0-33-8} face is no more than 2 degrees. A second inclination angle of the second side face is larger the first inclination angle.

## Claims

### Claim 1

A semiconductor device comprising:
a silicon carbide layer having a first plane and a second plane, the silicon carbide layer having an off angle of the first plane of no more than 8 degrees with respect to a (000-1) face;
a first electrode located on a side of the first plane of the silicon carbide layer;
a second electrode located on a side of the second plane of the silicon carbide layer;
a trench existing in the silicon carbide layer, the trench having a first side face, a second side face, and a bottom face between the first side face and the second side face;
a first silicon carbide region of a first conductivity type located in the silicon carbide layer and in contact with the first side face;
a second silicon carbide region of a second conductivity type located in the silicon carbide layer, the second silicon carbide region located between the first silicon carbide region and the first plane, and the second silicon carbide region being in contact with the first side face;
a third silicon carbide region of a second conductivity type located in the silicon carbide layer, the third silicon carbide region located between the first silicon carbide region and the first plane, the trench is located between the third silicon carbide region and the second silicon carbide region;
a fourth silicon carbide region of a first conductivity type located in the silicon carbide layer, the fourth silicon carbide region located between the second silicon carbide region and the first plane, and the fourth silicon carbide region being in contact with the first side face;
a fifth silicon carbide region of a first conductivity type located in the silicon carbide layer, and the fifth silicon carbide region located between the third silicon carbide region and the first plane, the trench is located between the fifth silicon carbide region and the fourth silicon carbide region;
a sixth silicon carbide region of a second conductivity type located in the silicon carbide layer and the sixth silicon carbide region being in contact with the second side face and the bottom face;
a gate electrode located between the first side face and the second side face; and
a gate insulating layer located between the gate electrode and the second silicon carbide region,
wherein the first side face has a first region that is in contact with the second silicon carbide region and has a first inclination angle with respect to the first plane,
an off angle of the first region with respect to a {0-33-8} face is no more than 2 degrees, and
a second inclination angle of the second side face with respect to the first plane is larger than the first inclination angle.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the first inclination angle is no less than 56 degrees.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the second inclination angle is no less than 80 degrees.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the first region has an off angle of no more than 2 degrees with respect to a (0-33-8) face or a (−303-8) face.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the first side face has a second region closer to the second plane than the first region, and a third inclination angle of the second region with respect to the first plane is larger than the first inclination angle.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, further comprising a seventh silicon carbide region of a first conductivity type located in the silicon carbide layer, the seventh silicon carbide region located between the first silicon carbide region and the second plane, and the seventh silicon carbide region being in contact with the second plane, the seventh silicon carbide region having a first conductivity type impurity concentration higher than the first silicon carbide region.

### Claim 7 (depends on 1)

An inverter circuit comprising the semiconductor device according to claim 1.

### Claim 8 (depends on 1)

A driving device comprising the semiconductor device according to claim 1.

### Claim 9 (depends on 1)

A vehicle comprising the semiconductor device according to claim 1.

### Claim 10 (depends on 1)

An elevator comprising the semiconductor device according to claim 1.