# US 10,374,008 B2 · Memory device and method of manufacturing the same

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- Number: US 10,374,008 B2
- Document ID: US10374008B2
- Status: Granted
- Kind: B2
- Application number: 15/655,118
- Filed: 2017-07-20
- Published: 2017-11-02
- Granted: 2019-08-06
- Earliest claimed: 2016-02-22
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Dong-Jun Seong; Soon-Oh Park
- Web page: https://patentgrep.com/patent/US10374008B2

## CPC

- H10B 63/24: {of the Ovonic threshold switching type}
- H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays}
- H10B 63/845: {the switching components being connected to a common vertical conductor}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/828: {Current flow limiting means within the switching material region, e.g. constrictions}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A method of manufacturing a memory device includes sequentially forming and then etching a preliminary selection device layer, a preliminary middle electrode layer, and a preliminary variable resistance layer on a substrate, thereby forming a selection device, a middle electrode, and a variable resistance layer. At least one of a side portion of the selection device or a side portion of the variable resistance layer is removed so that a first width of the middle electrode in a first direction parallel to a top of the substrate is greater than a second width of the variable resistance layer in the first direction or a third width of the selection device in the first direction. A capping layer is formed on at least one of a side wall of the etched side portion of the selection device or a side wall of the etched side portion of the variable resistance layer.

## Claims

### Claim 1

A memory device, comprising:
a substrate;
an insulating interlayer disposed on the substrate;
a word line disposed on the insulation interlayer;
a bottom electrode disposed on the word line;
a selection device disposed on the bottom electrode, wherein a first capping layer is disposed on a side wall of the selection device, wherein an outer sidewall of the first capping layer is coplanar with an outer sidewall of the word line along a direction orthogonal to an upper surface of the substrate;
a middle electrode disposed on the selection device;
a variable resistance layer disposed on the middle electrode, wherein a second capping layer is disposed on a side wall of the variable resistance layer;
a top electrode disposed on the variable resistance layer; and
a bit line disposed on the top electrode.

### Claim 2 (depends on 1)

The memory device of claim 1, wherein the first capping layer has a first thickness in a first direction substantially parallel to a top surface of the substrate, the second capping layer has a second thickness in the first direction, and the second thickness is substantially greater than the first thickness.

### Claim 3 (depends on 1)

The memory device of claim 1, wherein the selection device has a first width in a first direction substantially parallel to a top surface of the substrate, the variable resistance layer has a second width in the first direction, and the second width is substantially smaller than the first width.

### Claim 4 (depends on 3)

The memory device of claim 3, wherein the word line has a third width in the first direction,
wherein the third width is substantially greater than the first width or the second width.

### Claim 5 (depends on 1)

The memory device of claim 1, further comprising an insulation pattern disposed on side walls of each of the first capping layer, the middle electrode, and the second capping layer, wherein the insulation pattern is separated from the side wall of the selection device by the first capping layer, and wherein the insulation pattern is separated from the side wall of the variable resistance layer by the second capping layer.

### Claim 6 (depends on 1)

The memory device of claim 1, further comprising an insulation liner between the second capping layer and the variable resistance layer.

### Claim 7 (depends on 1)

The memory device of claim 1, wherein a side wall of the word line is substantially aligned with a side wall of the first capping layer.

### Claim 8

A memory device, comprising:
a substrate;
an insulating interlayer disposed on the substrate;
a word line disposed on the insulation interlayer;
a bottom electrode disposed on the word line;
a selection device disposed on the bottom electrode, wherein a first capping layer is disposed on a side wall of the selection device;
a middle electrode disposed on the selection device;
a variable resistance layer disposed on the middle electrode, wherein a second capping layer is disposed on a side wall of the variable resistance layer, and wherein the second capping layer is unconnected with the first capping layer;
a top electrode disposed on the variable resistance layer; and
a bit line disposed on the top electrode,
wherein the selection device has a first width in a first direction parallel to a top surface of the substrate, the first width is substantially smaller than a width of the word line or a width of the bit line, or
wherein the variable resistance layer has a second width in the first direction, the second width is substantially smaller than the width of the word line or the width of the bit line.

### Claim 9 (depends on 8)

The memory device of claim 8, wherein the second width is substantially smaller than the first width.

### Claim 10 (depends on 8)

The memory device of claim 8, wherein the first capping layer has a first thickness in the first direction, the second capping layer has a second thickness in the first direction, and the second thickness is substantially greater than the first thickness.

### Claim 11 (depends on 8)

The memory device of claim 8, further comprising an insulation pattern disposed on side walls of each of the first capping layer, the middle electrode, and the second capping layer, wherein the insulation pattern is separated from the side wall of the selection device by the first capping layer, and wherein the insulation pattern is separated from the side wall of the variable resistance layer by the second capping layer.

### Claim 12 (depends on 8)

The memory device of claim 8, further comprising an insulation liner between the second capping layer and the variable resistance layer.

### Claim 13 (depends on 8)

The memory device of claim 8, wherein a side wall of the word line is substantially aligned with a side wall of the first capping layer.

### Claim 14

A memory device, comprising:
a substrate;
an insulating interlayer disposed on the substrate;
a word line disposed on the insulation interlayer;
a bottom electrode disposed on the word line;
a selection device disposed on the bottom electrode, wherein a first capping layer is disposed on a side wall of the selection device, wherein an outer sidewall of the first capping layer is coplanar with an outer sidewall of the word line along a direction orthogonal to an upper surface of the substrate;
a middle electrode disposed on the selection device;
a variable resistance layer disposed on the middle electrode, wherein a second capping layer is disposed on a side wall of the variable resistance layer;
a top electrode disposed on the variable resistance layer; and
a bit line disposed on the top electrode,
wherein the first capping layer has a first thickness in a first direction substantially parallel to a top surface of the substrate, the second capping layer has a second thickness in the first direction, and the second thickness is different from the first thickness.

### Claim 15 (depends on 14)

The memory device of claim 14, wherein the second thickness is substantially greater than the first thickness.

### Claim 16 (depends on 14)

The memory device of claim 14, wherein the selection device has a first width in the first direction, the variable resistance layer has a second width in the first direction, and the second width is substantially smaller than the first width.

### Claim 17 (depends on 16)

The memory device of claim 16, wherein the word line has a third width in the first direction, and the third width is substantially greater than the first width or the second width.

### Claim 18 (depends on 14)

The memory device of claim 14, wherein a side wall of the word line is substantially aligned with a side wall of the first capping layer.