# US 10,373,985 B2 · Display device using micro light emitting diode > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,373,985 B2 - Document ID: US10373985B2 - Status: Granted - Kind: B2 - Application number: 15/485,545 - Filed: 2017-04-12 - Published: 2017-10-12 - Granted: 2019-08-06 - Earliest claimed: 2016-04-12 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Minsoo Kim; Mugyeom Kim - Web page: https://patentgrep.com/patent/US10373985B2 ## CPC - H10D 86/60: wherein the TFTs are in active matrices - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10W 90/00: Package configurations - H10D 86/40: characterised by multiple TFTs - H10H 20/856: Reflecting means - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract A display device includes a display substrate; a thin film transistor over the display substrate; a bank layer covering the thin film transistor, where an opening is defined through the bank layer; an emission layer in the opening and including a micro p-n diode; a first electrode electrically connected between the thin film transistor and the emission layer; a second electrode over the emission layer; and a sealing layer covering the second electrode. The thin film transistor and the emission layer are adjacent to each other in a horizontal direction of the display substrate. ## Claims ### Claim 1 A display device comprising: a display substrate; a thin film transistor over the display substrate, wherein the thin film transistor comprises a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode; a bank layer covering the thin film transistor, wherein an upper surface of the bank layer is substantially planar, an opening is defined through the bank layer, and the opening is spaced apart from the semiconductor active layer of the thin film transistor when viewed from a plan view in a vertical direction of the display substrate; an emission layer in the opening, wherein the emission layer comprises a micro p-n diode; a first electrode electrically connected between the thin film transistor and the emission layer; a second electrode over the emission layer and arranged to overlap the first electrode when viewed from the plan view in the vertical direction of the display substrate; a mirror layer over the bank layer, wherein the mirror layer is arranged to overlap the thin film transistor when viewed from the plan view in the vertical direction of the display substrate, and wherein the mirror layer comprises a reflective material; and a sealing layer covering the second electrode, wherein the thin film transistor and the emission layer are adjacent to each other in a horizontal direction of the display substrate. ### Claim 2 (depends on 1) The display device of claim 1, wherein the source electrode or the drain electrode extend below the emission layer, the first electrode is between the emission layer and an extension portion of the source electrode or the drain electrode, the mirror layer is separated from the first electrode and is over the bank layer, a color filter layer of a color corresponding to a sub-pixels is around the emission layer, and the second electrode is over the color filter layer and is electrically connected to the emission layer. ### Claim 3 (depends on 1) The display device of claim 1, wherein the mirror layer is defined by a portion extending from the first electrode. ### Claim 4 (depends on 3) The display device of claim 3, wherein the first electrode covers an edge of the source electrode or the drain electrode exposed via the opening and extends over the upper surface of the bank layer to overlap the thin film transistor, the mirror layer is defined by an extension portion of the first electrode extending over the upper surface of the bank layer, an insulating layer burying the emission layer extends over the bank layer, the second electrode is over the insulating layer and is electrically connected to the emission layer, and an opening is defined through the second electrode in a portion overlapping the mirror layer in the vertical direction of the display substrate. ### Claim 5 (depends on 3) The display device of claim 3, wherein the first electrode covers an edge of the source electrode or the drain electrode exposed via the opening and extends over the upper surface of the bank layer to overlap the thin film transistor in the vertical direction of the display substrate, the mirror layer is defined by an extension portion of the first electrode extending over the upper surface of the bank layer, an insulating layer burying the emission layer extends over the bank layer, and the second electrode is over the insulating layer, is electrically connected to the emission layer, and has a stacked structure including the mirror layer and the insulating layer disposed between the mirror layer and the second electrode. ### Claim 6 (depends on 5) The display device of claim 5, further comprising: a lateral reflective layer, which reflects light irradiated to a lateral surface of the emission layer and is over a lateral surface of the emission layer. ### Claim 7 (depends on 5) The display device of claim 5, wherein a portion of the source electrode or the drain electrode extends below the emission layer, an extension portion of the source electrode or the drain electrode has a ring shape, and a portion of the insulating layer around the emission layer has a trench shape. ### Claim 8 (depends on 3) The display device of claim 3, wherein the first electrode covers an edge of the source electrode or the drain electrode exposed via the opening and extends over the upper surface of the bank layer to overlap the thin film transistor in the vertical direction of the display substrate, the mirror layer is defined by an extension portion of the first electrode extending over the upper surface of the bank layer, an insulating layer burying the emission layer is over the bank layer, an opening is defined in the insulating layer in a portion overlapping the mirror layer in the vertical direction of the display substrate, the second electrode is over the insulating layer, is electrically connected to the emission layer, and exposes the mirror layer when viewed in the vertical direction of the display substrate. ### Claim 9 (depends on 8) The display device of claim 8, wherein a portion of the source electrode or the drain electrode extends below the emission layer, and an extension portion of the source electrode or the drain electrode is arranged in a zigzag pattern. ### Claim 10 (depends on 1) The display device of claim 1, wherein one of the gate electrode, the source electrode and the drain electrode of the thin film transistor extends below the emission layer, the first electrode is defined by an extension portion of the one of the gate electrode, the source electrode and the drain electrode extending below the emission layer. ### Claim 11 (depends on 10) The display device of claim 10, wherein an insulating layer burying the emission layer extends over the bank layer, the mirror layer is separated from the first electrode and is over the bank layer, the second electrode is over the insulating layer and is electrically connected to the emission layer, and the display device further comprises a lateral reflective layer, which reflects light irradiated to a lateral surface of the emission layer and is over a lateral surface of the emission layer. ### Claim 12 (depends on 10) The display device of claim 10, wherein the second electrode is over the bank layer and is electrically connected to the emission layer, the mirror layer is separated from the first electrode and is over the second electrode, and the display device further comprises a lateral reflective layer, which reflects light irradiated to a lateral surface of the emission layer and is over a lateral surface of the emission layer. ### Claim 13 (depends on 12) The display device of claim 12, wherein an extension portion of the one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode is arranged in a zigzag pattern. ### Claim 14 (depends on 1) The display device of claim 1, further comprising a conductive layer, which is below the emission layer and connected to one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode of the thin film transistor, wherein the first electrode is between the emission layer and the conductive layer, and wherein the second electrode is electrically connected to the emission layer. ### Claim 15 (depends on 14) The display device of claim 14, wherein the conductive layer is in a same layer in which the one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode is arranged, and the conductive layer is electrically connected to an extension portion of the one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode. ### Claim 16 (depends on 14) The display device of claim 14, wherein the conductive layer is defined by an extension portion of the one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode. ### Claim 17 (depends on 16) The display device of claim 16, wherein the extension portion of the one of the semiconductor active layer, the gate electrode, the source electrode and the drain electrode is arranged in a zigzag pattern. ### Claim 18 A display device comprising: a display substrate; a thin film transistor over the display substrate, wherein the thin film transistor comprises a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode; a bank layer covering the thin film transistor, wherein an opening is defined through the bank layer; an emission layer in the opening, wherein the emission layer comprises a micro p-n diode; a first electrode electrically connected between the thin film transistor and the emission layer; a second electrode over the emission layer; and a sealing layer covering the second electrode, wherein the thin film transistor and the emission layer are adjacent to each other in a horizontal direction of the display substrate, the first electrode covers an edge of the source electrode or the drain electrode which is exposed via the opening, the first electrode comprises a transparent electrode extending below the emission layer, and the second electrode is electrically connected to the emission layer and comprises a reflective electrode which reflects light in a direction to the display substrate.