# US 10,373,923 B2 · Package with passive devices and method of forming the same

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- Number: US 10,373,923 B2
- Document ID: US10373923B2
- Status: Granted
- Kind: B2
- Application number: 15/823,110
- Filed: 2017-11-27
- Published: 2018-03-22
- Granted: 2019-08-06
- Earliest claimed: 2012-06-29
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Shuo-Mao Chen; Der-Chyang Yeh; Li-Hsien Huang
- Web page: https://patentgrep.com/patent/US10373923B2

## CPC

- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 20/071: {of dielectric parts thereof}
- H10W 20/49: Adaptable interconnections, e.g. fuses or antifuses
- H10W 20/496: {Capacitor integral with wiring layers}
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10W 20/498: {Resistive arrangements or effects of, or between, wiring layers}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 74/01: Manufacture or treatment
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 74/147: {the encapsulations being multilayered}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/121: {by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An embodiment is a device comprising a substrate, a metal pad over the substrate, and a passivation layer comprising a portion over the metal pad. The device further comprises a metal pillar over and electrically coupled to the metal pad, and a passive device comprising a first portion at a same level as the metal pillar, wherein the first portion of the passive device is formed of a same material as the metal pillar.

## Claims

### Claim 1

A structure comprising:
a conductive pad over a substrate;
a passivation layer over the substrate;
a conductive pillar over and electrically coupled to the conductive pad, the conductive pillar being in and physically contacting the passivation layer;
a molding compound surrounding the substrate and the passivation layer; and
a passive device comprising a first portion in and physically contacting the passivation layer, and a second portion overlying the molding compound, a surface of the molding compound being level with top surfaces of the conductive pillar and the first portion of the passive device;
a dielectric layer over and physically contacting the conductive pillar, the first portion of the passive device, the passivation layer, and the molding compound;
a conductive interconnect over and physically contacting the dielectric layer, the conductive interconnect being electrically coupled to the conductive pillar; and
a first via in the dielectric layer, the first via electrically coupling the conductive interconnect and the conductive pillar.

### Claim 2 (depends on 1)

The structure of claim 1, wherein a material composition of the first portion of the passive device is the same as the conductive pillar.

### Claim 3 (depends on 1)

The structure of claim 1, wherein the passive device is selected from a group consisting essentially of a resistor, a capacitor, an inductor, a transformer, a co-planar waveguide, a strip-line, or a combination thereof.

### Claim 4 (depends on 1)

The structure of claim 1, wherein the passive device further comprises a third portion over the dielectric layer, the third portion of the passive device having a same material composition as the conductive interconnect.

### Claim 5 (depends on 4)

The structure of claim 4, wherein a third portion of the passive device overlies both the substrate and the molding compound.

### Claim 6 (depends on 1)

The structure of claim 1, wherein the passivation layer comprises a first passivation layer and a second passivation layer, the conductive pillar extending through both the first and second passivation layers, and the first portion of the passive device extending through the second passivation layer and being over the first passivation layer.

### Claim 7

A device comprising:
a metal pad over a substrate;
a first passivation layer over the substrate;
a second passivation layer over the first passivation layer;
a molding compound surrounding and physically contacting the substrate, the first passivation layer, and the second passivation layer;
a metal pillar over and electrically coupled to the metal pad, the metal pillar extending through the first and second passivation layers; and
a passive device comprising a first portion and a second portion, the first portion being over the first passivation layer and in the second passivation layer, the second portion being over the first portion, the first portion of the passive device having a same material composition as the metal pillar, top surfaces of the metal pillar, the first portion of the passive device, and the second passivation layer being level with each other.

### Claim 8 (depends on 7)

The device of claim 7, wherein the passive device is selected from a group consisting essentially of a resistor, a capacitor, an inductor, a transformer, a co-planar waveguide, a strip-line, or a combination thereof.

### Claim 9 (depends on 7)

The device of claim 7, wherein the passive device comprises a second portion over and aligned to the molding compound.

### Claim 10 (depends on 7)

The device of claim 7, wherein the molding compound comprises a polymer.

### Claim 11 (depends on 7)

The device of claim 7, wherein top surfaces of the metal pillar, the first portion of the passive device, the second passivation layer, and the molding compound are level with each other.

### Claim 12 (depends on 7)

The device of claim 7, wherein the first portion of the passive device comprises a barrier layer and a copper layer over the barrier layer.

### Claim 13

A structure comprising:
a die comprising:
a semiconductor substrate;
a conductive pad over the semiconductor substrate;
a passivation layer over the semiconductor substrate and partially over the conductive pad; and
a conductive pillar over and electrically coupled to the conductive pad, the conductive pillar being in and physically contacting the passivation layer;
an encapsulant laterally surrounding the die;
a dielectric layer over and physically contacting the conductive pillar, the passivation layer, and the encapsulant;
a post-passivation interconnect (PPI) line over the dielectric layer and electrically coupled to the conductive pad through the conductive pillar and a via in the dielectric layer; and
a passive device comprising a first portion in the passivation layer, and a second portion over the dielectric layer.

### Claim 14 (depends on 13)

The structure of claim 13, wherein the second portion of the passive device comprises a portion over and aligned to the encapsulant.

### Claim 15 (depends on 13)

The structure of claim 13, wherein the passive device is selected from a group consisting of a resistor, a capacitor, an inductor, a transformer, a co-planar waveguide, a strip-line, or a combination thereof.

### Claim 16 (depends on 13)

The structure of claim 13, wherein a bottom surface of the encapsulant is level with a bottom surface of the semiconductor substrate, and wherein a top surface of the encapsulant is level with top surfaces of the passivation layer and the conductive pillar.

### Claim 17 (depends on 13)

The structure of claim 13, wherein the first portion of the passive device is formed of a same material as the conductive pillar.

### Claim 18 (depends on 13)

The structure of claim 13, wherein outermost sidewalls of the passivation layer are coterminous with outermost sidewalls of the semiconductor substrate.

### Claim 19 (depends on 7)

The device of claim 7 further comprising:
a dielectric layer over and physically contacting the metal pillar, the first portion of the passive device, the second passivation layer, and the molding compound.