# US 10,373,868 B2 · Method of processing a porous conductive structure in connection to an electronic component on a substrate

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- Number: US 10,373,868 B2
- Document ID: US10373868B2
- Status: Granted
- Kind: B2
- Application number: 14/997,601
- Filed: 2016-01-18
- Published: 2017-07-20
- Granted: 2019-08-06
- Earliest claimed: 2016-01-18
- Assignees: Infineon Technologies Austria AG; Technische Universitaet Graz
- Applicants: Infineon Technologies Austria AG
- Inventors: Martin Mischitz; Markus Heinrici; Michael Roesner; Oliver Hellmund; Caterina Travan; Manfred Schneegans; Peter Irsigler; Friedrich Kroener
- Web page: https://patentgrep.com/patent/US10373868B2

## CPC

- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10D 62/129: {Cathode regions of diodes}
- H10W 72/0198: {batch processes}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 12/441: {Vertical IGBTs}
- H10W 72/01923: {in liquid form, e.g. by dispensing droplets or by screen printing}
- H10W 72/01925: {in solid form}
- H10W 72/01933: {in liquid form, e.g. spin coating, spray coating or immersion coating}
- H10W 72/01935: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01951: {Changing the shapes of bond pads}
- H10W 72/01961: {Chemical or physical modification, e.g. by sintering or anodisation (patterning H10W72/01951)}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/925: {Bond pads having a filler embedded in a matrix}
- H10W 72/931: {Shapes of bond pads}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/953: {not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.

## Claims

### Claim 1

A method for processing a semiconductor substrate, the method comprising:
processing a plurality of device regions in a semiconductor substrate laterally separated from each other by dicing regions, each device region comprising at least one electronic component, wherein processing each device region of the plurality of device regions comprises:
forming a recess into the semiconductor substrate in the device region directly over the at least one electronic component, wherein the recess comprises vertical recess sidewalls of the semiconductor substrate and extends into the semiconductor substrate towards the at least one electronic component, wherein the recess sidewalls are arranged in the device region;
forming a contact pad in the recess that is directly over the at least one electronic component to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and
singulating the plurality of device regions from each other by dicing the semiconductor substrate in the dicing region.

### Claim 2 (depends on 1)

The method of claim 1,
wherein the at least one electronic component includes at least one power electronic component.

### Claim 3 (depends on 1)

The method of claim 1,
forming at least one further contact pad to electrically connect the at least one electronic component opposite the recess.

### Claim 4 (depends on 1)

The method of claim 1,
wherein a depth of the recess is greater than half a thickness of the at least one electronic component.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
disposing a solder material over the contact pad.

### Claim 6 (depends on 1)

The method of claim 1,
wherein forming the contact pad comprises disposing solid particles in the recess.

### Claim 7 (depends on 1)

The method of claim 1,
wherein forming the contact pad comprises at least one of printing, dispenser deposition, plasma dust deposition, and electrochemical deposition.

### Claim 8 (depends on 1)

The method of claim 1,
wherein forming the contact pad comprises using a mask.

### Claim 9 (depends on 1)

The method of claim 1,
wherein forming the contact pad comprises planarizing the contact pad.

### Claim 10 (depends on 1)

The method of claim 1,
wherein the contact pad comprises or a solid portion of the contact pad is formed from an electrically conductive material.

### Claim 11 (depends on 1)

The method of claim 1,
wherein the contact pad comprises or a solid portion of the contact pad is formed from at least one of silver, nickel, gold and copper.

### Claim 12 (depends on 1)

The method of claim 1,
wherein a porosity of the contact pad is in the range from 10% to 90%.

### Claim 13 (depends on 1)

The method of claim 1,
wherein forming the contact pad comprises etching and heating.

### Claim 14 (depends on 1)

The method of claim 1,
wherein forming the recess is configured such that a cross section of the recess changes into a direction towards the at least one electronic component.

### Claim 15 (depends on 1)

The method of claim 1,
wherein a width of the recess is greater than a distance of the recess from the dicing region.

### Claim 16 (depends on 1)

The method of claim 1,
wherein the contact pad has the greater porosity than the at least one of the recess sidewalls, when the singulating of the plurality of device regions from each other is conducted.

### Claim 17 (depends on 6)

The method of claim 6,
wherein, when the solid particles are disposed in the recess, the solid particles comprise electrically conductive particles and/or are dispersed in a non-solid material.

### Claim 18 (depends on 1)

The method of claim 1,
wherein forming the contact pad in the recess includes heating the contact pad to or above an evaporation or decomposition temperature of a non-solid material of the contact pad.

### Claim 19

A method for processing a semiconductor substrate, the method comprising:
processing a plurality of device regions in a semiconductor substrate laterally separated from each other by dicing regions, each device region comprising at least one semiconductor component, wherein processing each device region of the plurality of device regions comprises:
forming a recess into the semiconductor substrate in the device region directly over the at least one semiconductor component, wherein the recess comprises vertical recess sidewalls of the semiconductor substrate and extends into the semiconductor substrate towards the at least one semiconductor component, wherein the recess sidewalls are arranged in the device region;
forming a metallization in the recess that is directly over the at least one semiconductor component for mechanical stabilization, wherein the metallization has a greater porosity than the recess sidewalls; and
singulating the plurality of device regions from each other by dicing the semiconductor substrate in the dicing region.

### Claim 20

A method for processing a substrate, the method comprising:
processing a plurality of device regions in a substrate laterally separated from each other by dicing regions, each device region comprising at least one electronic component, wherein processing each device region of the plurality of device regions comprises:
forming a recess into the substrate in the device region directly over the at least one electronic component, wherein the recess comprises vertical recess sidewalls of the substrate and extends into the substrate towards the at least one electronic component, wherein the recess sidewalls are arranged in the device region;
forming a contact pad in the recess that is directly over the at least one electronic component to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and
singulating the plurality of device regions from each other by dicing the substrate in the dicing region;
wherein the recess sidewalls comprise a semiconductor material and a greater hardness than the contact pad.
