# US 10,373,844 B2 · Integrated circuit package configurations to reduce stiffness

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- Number: US 10,373,844 B2
- Document ID: US10373844B2
- Status: Granted
- Kind: B2
- Application number: 15/590,890
- Filed: 2017-05-09
- Published: 2017-11-30
- Granted: 2019-08-06
- Earliest claimed: 2014-02-25
- Assignees: Intel IP Corporation
- Applicants: Intel IP Corporation
- Inventors: Sven Albers; Sonja Koller; Thorsten Meyer; Georg Seidemann; Christian Geissler; Andreas Wolter
- Web page: https://patentgrep.com/patent/US10373844B2

## CPC

- H10W 74/01: Manufacture or treatment
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W 72/0198: {batch processes}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/9413: {on encapsulations}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 74/10: characterised by their shape or disposition
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface. In embodiments, the second surface may be shaped such that one or more cross-section areas of the IC package are thinner than one or more other cross-section areas of the IC package. Other embodiments may be described and/or claimed.

## Claims

### Claim 1

An integrated circuit (IC) package comprising: a die having a first side and a second side disposed opposite to the first side; an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface, wherein the encapsulation material includes a first side, a second side, a third side, and a fourth side disposed between the first surface and the second surface, wherein the second side is directly adjacent to the first side, the third side is directly adjacent to the second side, and the fourth side is directly adjacent to the third side, wherein the first side and the second side of the encapsulation material are substantially perpendicular to one another, and wherein the third side and the fourth side of the encapsulation material are substantially perpendicular to each other; a first trench formed in the second surface, wherein the trench extends from the first side to the second side of the encapsulation material, a second trench formed in the second surface, wherein the second trench extends from the second side to the third side of the encapsulation material, a third trench formed in the second surface, wherein the third trench extends from the third side to the fourth side of the encapsulation material; and a fourth trench formed in the second surface, wherein the fourth trench extends from the fourth side to the first side of the encapsulation material, wherein the first, second, third, and fourth trenches intersect respectively first, second, third, and fourth sides under varying angles such that the first, second, third and fourth trenches form a geometric figure other than a square, wherein the second surface of the encapsulating material has a shape such that one or more cross sectional areas is thinner than one or more other cross sectional areas, and the trenches are formed at various depths to achieve the thinner cross sectional areas.

### Claim 2 (depends on 1)

The IC package of claim 1, wherein a shape of the second surface that includes the trenches reduces rigidity of the IC package.

### Claim 3 (depends on 1)

The IC package of claim 1, wherein at least some of the trenches are unfilled.

### Claim 4 (depends on 1)

The IC package of claim 1, wherein: the die includes flip-chip interconnect structures; and the first surface includes redistribution features that are electrically coupled with the flip- chip interconnect structures; and the redistribution features form a fan out region of the IC package.