# US 10,373,826 B2 · Metal interconnect structure

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- Number: US 10,373,826 B2
- Document ID: US10373826B2
- Status: Granted
- Kind: B2
- Application number: 15/644,089
- Filed: 2017-07-07
- Published: 2017-10-26
- Granted: 2019-08-06
- Earliest claimed: 2014-06-13
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation
- Inventors: Baojun Zhao
- Web page: https://patentgrep.com/patent/US10373826B2

## CPC

- H10P 76/2041: {Photolithographic processes}
- G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
- H10P 50/73: {using masks for insulating materials}
- H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning}
- H10W 20/42: Vias, e.g. via plugs
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method is provided for fabricating a metal interconnect structure. The method includes forming a reticle having a metal line pattern region and at least a scattering bar by an optical proximity correction process; and providing a semiconductor substrate having a first dielectric layer and at least one conductive via. The method also includes aligning the reticle with the semiconductor substrate with the conductive via to align the scattering bar next to the conductive via; and forming metal line patterns on the first dielectric layer and a top surface of the conductive via to completely cover the conducive via.

## Claims

### Claim 1

A metal interconnect structure, comprising:
a semiconductor substrate;
at least one conductive via formed on a surface of the semiconductor substrate;
a first dielectric layer with a surface leveling with top surface of the conductive via formed on the surface of the semiconductor substrate;
a reticle substrate including at least a scattering bar and a metal line pattern region, having a plurality of metal line patterns; and
a plurality of metal lines on the first dielectric layer and on a top surface of the conductive via to overlap with the conductive via on the semiconductor substrate, the plurality of metal lines completely covering and electrically contacting the conductive vias on the semiconductor substrate, wherein the plurality of metal lines are formed using the reticle substrate, in a photo-exposure process, wherein:
the scattering bar is extending in an extending direction of the plurality of metal lines on the surface of the semiconductor substrate;
the scattering bar on the reticle is located next to the conductive via on the semiconductor substrate for the photo-exposure process; and
the plurality of metal lines corresponds to the plurality of metal line patterns on the reticle.

### Claim 2 (depends on 1)

The metal interconnect structure according to claim 1, further comprising:
two or more scattering bars that are parallel.

### Claim 3 (depends on 2)

The metal interconnect structure according to claim 2, wherein:
the scattering bars are aligned near to the conductive vias to change a light intensity distribution of the photoresist layer at the conductive via.

### Claim 4 (depends on 1)

The metal interconnect structure according to claim 1, wherein:
a width of the scattering bar is in a range of approximately 15 nm˜30 nm.

### Claim 5 (depends on 4)

The metal interconnect structure according to claim 4, wherein:
a shape of the conductive via is rectangular.

### Claim 6 (depends on 1)

The metal interconnect structure according to claim 1, further comprising:
a second dielectric layer formed on the first dielectric layer, wherein the plurality of metal lines is within the second dielectric layer.

### Claim 7 (depends on 6)

The metal interconnect structure according to claim 6, wherein a top surface of the second dielectric layer being coplanar with a top surface of the plurality of metal lines.

### Claim 8 (depends on 1)

The metal interconnect structure according to claim 1, further comprising:
two or more conductive vias, wherein:
the scattering bar is a continuous long stripe parallel to a connection line of centers of the two or more conductive vias.

### Claim 9 (depends on 1)

The metal interconnect structure according to claim 1, wherein:
a distance between adjacent metal line patterns is in a range of approximately 30 nm˜100 nm.

### Claim 10 (depends on 1)

The metal interconnect structure according to claim 1, wherein:
the conductive via on the semiconductor substrate is aligned between the scattering bar on the reticle and the plurality of metal line patterns on the reticle, and
the conductive via on the semiconductor substrate overlaps with at least one of the plurality of metal line patterns on the reticle.

### Claim 11 (depends on 1)

The metal interconnect structure according to claim 1, wherein:
the scattering bar is a long stripe; and
the long stripe of the scattering bar has a length direction perpendicular to a direction of a connect line between a center of the scattering bar and a center of the plurality of metal line patterns.