# US 10,373,690 B2 · Memory system and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,373,690 B2 - Document ID: US10373690B2 - Status: Granted - Kind: B2 - Application number: 15/927,133 - Filed: 2018-03-21 - Published: 2019-02-28 - Granted: 2019-08-06 - Earliest claimed: 2017-08-28 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Jong-Min Lee - Web page: https://patentgrep.com/patent/US10373690B2 ## CPC - G11C 16/16: for erasing blocks, e.g. arrays, words, groups - G06F 1/3225: of memory devices - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 13/1642: {with request queuing} - G11C 11/4074: Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits - G11C 11/5635: {Erasing circuits} - G11C 11/5671: {using charge trapping in an insulator} - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 16/30: Power supply circuits - G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc - G06F 2212/7205: Cleaning, compaction, garbage collection, erase control - G06F 2212/7211: Wear leveling - G11C 16/0483: {comprising cells having several storage transistors connected in series} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G11C: STATIC STORES (semiconductor memory devices H10B) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A memory system includes: a nonvolatile memory device including a plurality of memory blocks; and a controller suitable for dividing the plurality of memory blocks into a first group and a second group, and controlling the memory blocks included the first group and the second group, respectively, wherein the controller is further suitable for: managing all operations except for an erase operation to the memory blocks of the first group through a first operation task; managing all operations except for an erase operation to the memory blocks of the second group through a second operation task; and managing the erase operation to the memory blocks of the first group and the memory blocks of the second group through an erase operation task. ## Claims ### Claim 1 A memory system comprising: a nonvolatile memory device including a plurality of memory blocks; and a controller suitable for dividing the plurality of memory blocks into a first group and a second group, and controlling the memory blocks included the first group and the second group, respectively, wherein the controller is further suitable for: managing all operations except for an erase operation to the memory blocks of the first group through a first operation task; managing all operations except for an erase operation to the memory blocks of the second group through a second operation task; and managing the erase operation to the memory blocks of the first group and the memory blocks of the second group through an erase operation task. ### Claim 2 (depends on 1) The memory system of claim 1, wherein the controller is suitable for, when there is need to perform an erase operation to a first memory block among the memory blocks of the first group as a result of a first predetermined operation through the first operation task, providing information of the first memory block into a first erase operation list managed by the erase operation task and performing an erase operation to memory blocks included in the first erase operation list through the erase operation task when a first predetermined condition is satisfied. ### Claim 3 (depends on 2) The memory system of claim 2, wherein the controller is suitable for performing an erase operation to a first portion of memory block selected among the memory blocks included in the first erase operation list through the erase operation task by determining that the first predetermined condition is satisfied when a ratio of memory blocks in a free status to memory blocks in a “being used” status among the memory blocks of the first group is below a first predetermined threshold ratio, or when a number of memory blocks in the free status is below a first predetermined threshold number. ### Claim 4 (depends on 3) The memory system of claim 3, wherein the controller is suitable for controlling a number of memory blocks selected as the first portion of memory blocks among the memory blocks included in the first erase operation list according to a ratio of a number of memory blocks included in the first erase operation list to a number of memory blocks in the free status among the memory blocks of the first group. ### Claim 5 (depends on 2) The memory system of claim 2, wherein the controller is suitable for, when there is need to perform an erase operation to a second memory block among the memory blocks of the second group as a result of a second predetermined operation through the second operation task, including information of the second memory block into a second erase operation list managed by the erase operation task and performing an erase operation to memory blocks included in the second erase operation list through the erase operation task when a second predetermined condition is satisfied. ### Claim 6 (depends on 5) The memory system of claim 5, wherein the controller is suitable for performing an erase operation to a second portion of memory block selected among the memory blocks included in the second erase operation list through the erase operation task by determining the second predetermined condition as satisfied when a ratio of memory blocks in a free status to memory blocks in a “being used” status among the memory blocks of the second group is below a second predetermined threshold ratio, or when a number of memory blocks in the free status is below a second predetermined threshold number. ### Claim 7 (depends on 6) The memory system of claim 6, wherein the controller is suitable for controlling a number of memory blocks selected as the second portion of memory blocks among the memory blocks included in the second erase operation list according to a ratio of a number of memory blocks included in the second erase operation list to a number of memory blocks in the free status among the memory blocks of the second group. ### Claim 8 (depends on 5) The memory system of claim 5, wherein the controller is suitable for, when a foreground operation is requested among all operations except for an erase operation managed through the first or second operation task during an erase operation to memory blocks included in the first or second erase operation list through the erase operation task, suspending the erase operation to memory blocks included in the first or second erase operation list through the erase operation task, performing the requested foreground operation through the first or second operation task, and then resuming the suspended erase operation to memory blocks included in the first or second erase operation list through the erase operation task. ### Claim 9 (depends on 8) The memory system of claim 8, wherein the controller is suitable for setting a higher priority to an erase operation to the memory blocks included in the first or second erase operation list managed through the erase operation task than a background operation among all operations except for an erase operation managed through the first or second operation task. ### Claim 10 (depends on 5) The memory system of claim 5, wherein the controller is suitable for: checking whether the first predetermined condition is satisfied whenever all operations except for an erase operation managed by the first operation task is performed N times; and checking whether the second predetermined condition is satisfied whenever all operations except for an erase operation managed by the second operation task is performed M times, and wherein each of N and M is a natural number greater than 1. ### Claim 11 An operating method for a memory system including a nonvolatile memory device having a plurality of memory blocks, the method comprising: a first step of controlling memory blocks included in a first group among the plurality of memory blocks; and a second step of controlling memory blocks included in a second group among the plurality of memory blocks, wherein the first step includes managing all operations except for an erase operation to the memory blocks of the first group through a first operation task, and managing the erase operation to the memory blocks of the first group through an erase operation task, wherein the second step includes managing all operations except for an erase operation to the memory blocks of the second group through a second operation task, and managing the erase operation to the memory blocks of the second group through the erase operation task. ### Claim 12 (depends on 11) The method of claim 11, wherein the first step includes, when there is need to perform an erase operation to a first memory block among the memory blocks of the first group as a result of a first predetermined operation through the first operation task, providing information of the first memory block into a first erase operation list managed by the erase operation task and performing an erase operation to memory blocks included in the first erase operation list through the erase operation task when a first predetermined condition is satisfied. ### Claim 13 (depends on 12) The method of claim 12, wherein the first step includes performing an erase operation to a first portion of memory block selected among the memory blocks included in the first erase operation list through the erase operation task by determining that the first predetermined condition is satisfied when a ratio of memory blocks in a free status to memory blocks in a “being used” status among the memory blocks of the first group is below a first predetermined threshold ratio, or when a number of memory blocks in the free status is below a first predetermined threshold number. ### Claim 14 (depends on 13) The method of claim 13, wherein the first step includes controlling a number of memory blocks selected as the first portion of memory blocks among the memory blocks included in the first erase operation list according to a ratio of a number of memory blocks included in the first erase operation list to a number of memory blocks in the free status among the memory blocks of the first group. ### Claim 15 (depends on 12) The method of claim 12, wherein the second step includes, when there is need to perform an erase operation to a second memory block among the memory blocks of the second group as a result of a second predetermined operation through the second operation task, including information of the second memory block into a second erase operation list managed by the erase operation task and performing an erase operation to memory blocks included in the second erase operation list through the erase operation task when a second predetermined condition is satisfied. ### Claim 16 (depends on 15) The method of claim 15, wherein the second step includes performing an erase operation to a second portion of a memory block selected among the memory blocks included in the second erase operation list through the erase operation task by determining that the second predetermined condition is satisfied when a ratio of memory blocks in a free status to memory blocks in a “being used” status among the memory blocks of the second group is below a second predetermined threshold ratio, or when a number of memory blocks in the free status is below a second predetermined threshold number. ### Claim 17 (depends on 16) The method of claim 16, wherein the second step includes controlling a number of memory blocks selected as the second portion of memory blocks among the memory blocks included in the second erase operation list according to a ratio of a number of memory blocks included in the second erase operation list to a number of memory blocks in the free status among the memory blocks of the second group. ### Claim 18 (depends on 15) The method of claim 15, wherein the first step includes, when a foreground operation is requested among all operations except for an erase operation managed through the first operation task during an erase operation to memory blocks included in the first erase operation list through the erase operation task, suspending the erase operation to memory blocks included in the first erase operation list through the erase operation task, performing the requested foreground operation through the first operation task, and then resuming the suspended erase operation to memory blocks included in the first erase operation list through the erase operation task, and wherein the second step includes, when a foreground operation is requested among all operations except for an erase operation managed through the second operation task during an erase operation to memory blocks included in the second erase operation list through the erase operation task, suspending the erase operation to memory blocks included in the second erase operation list through the erase operation task, performing the requested foreground operation through the second operation task, and then resuming the suspended erase operation to memory blocks included in the second erase operation list through the erase operation task. ### Claim 19 (depends on 18) The method of claim 18, wherein the first step includes setting a higher priority to an erase operation to the memory blocks included in the first erase operation list managed through the erase operation task than a background operation among all operations except for an erase operation managed through the first operation task, and wherein the second step includes setting a higher priority to an erase operation to the memory blocks included in the second erase operation list managed through the erase operation task than a background operation among all operations except for an erase operation managed through the second operation task. ### Claim 20 (depends on 15) The method of claim 15, wherein the first step includes checking whether the first predetermined condition is satisfied whenever all operations except for an erase operation managed by the first operation task is performed N times, wherein the second step includes checking whether the second predetermined condition is satisfied whenever all operations except for an erase operation managed by the second operation task is performed M times, and wherein each of N and M is a natural number greater than 1.