# US 10,373,667 B2 · Refresh rate adjust

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- Number: US 10,373,667 B2
- Document ID: US10373667B2
- Status: Granted
- Kind: B2
- Application number: 14/913,872
- Filed: 2013-08-28
- Published: 2016-07-21
- Granted: 2019-08-06
- Earliest claimed: 2013-08-28
- Assignees: Hewlett Packard Enterprise Development LP
- Applicants: Hewlett Packard Enterprise Development LP
- Inventors: Melvin K. Benedict; Eric L. Pope
- Web page: https://patentgrep.com/patent/US10373667B2

## CPC

- G11C 11/406: Management or control of the refreshing or charge-regeneration cycles
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0622: {in relation to access}
- G06F 3/0629: {Configuration or reconfiguration of storage systems}
- G06F 3/0673: {Single storage device}
- G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)}
- G06F 11/0751: {Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06)}
- G06F 11/076: {by exceeding a count or rate limit, e.g. word- or bit count limit}
- G06F 12/10: Address translation
- G06F 13/1636: {using refresh}
- G11C 7/02: with means for avoiding parasitic signals
- G11C 11/40611: {External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh}
- G11C 11/40622: {Partial refresh of memory arrays}
- G06F 21/566: {Dynamic detection, i.e. detection performed at run-time, e.g. emulation, suspicious activities}
- G11C 2211/4061: Calibration or ate or cycle tuning
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A technique includes determining that a row of memory has been activated at a threshold rate. Upon reaching the threshold rate, a refresh rate for the row of memory and an adjacent row of memory may be increased. Subsequent to the increase, the refresh rate may be returned to a default rate.

## Claims

### Claim 1

A method comprising:
determining, by a memory controller, that a row of memory has been activated at a threshold rate of activation, wherein the threshold rate of activation is less than a rate of activation at which other rows of the memory are impacted;
detecting aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that receive a predetermined number of activations within a period of time;
increasing, by the memory controller and in response to the detecting aggressor rows, a refresh rate for a region which contains the row of memory and an adjacent row of memory;
delaying, by the memory controller and to implement hysteresis, a decrease in the refresh rate for the region which contains the row of memory and the adjacent row of memory for a period of time; and
decreasing, by the memory controller, the refresh rate for the region which contains the row of memory and the adjacent row of memory based on a predetermined operating characteristic for decreasing the refresh rate for the region subsequent to the increase.

### Claim 2 (depends on 1)

The method of claim 1, wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory based on the predetermined operating characteristic for decreasing the refresh rate for the region comprises decreasing the refresh rate for the region based on an expiration of a period of time.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
monitoring, via the memory controller, the row of memory after increasing the refresh rate for the region to determine whether the row of memory is continually being activated at the threshold rate of activation; and
wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory based on the predetermined operating characteristic for decreasing the refresh rate for the region comprises decreasing the refresh rate for the region based on the monitoring indicating the row of memory is not being activated at the threshold rate of activation.

### Claim 4 (depends on 3)

The method of claim 3,
wherein the delaying the decreasing for a period of time is in response to the monitoring indicating the row of memory is not being activated at the threshold rate of activation.

### Claim 5 (depends on 1)

The method of claim 1, wherein increasing the refresh rate for the region comprises increasing the refresh rate for the region by a factor of two.

### Claim 6 (depends on 1)

The method of claim 1, wherein increasing the refresh rate for the region which contains the row of memory and an adjacent row of memory comprises increasing a refresh rate for a device comprising the row of memory and the adjacent row of memory.

### Claim 7 (depends on 1)

The method of claim 1, wherein decreasing the refresh rate for the region which contains the row of memory and the adjacent row of memory comprises returning the refresh rate for the region to a default refresh rate.

### Claim 8

A method comprising:
monitoring, by a computing device, an activated rate of a row of memory in a memory device;
determining, by the computing device, that the activation rate of the row of memory is approaching a rate of activation at which other rows of the memory are impacted;
detecting aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that receive a predetermined number of activations within a period of time;
adjusting, by the computing device and in response to the detecting aggressor rows, a refresh rate for the row of memory and an adjacent row of memory until the activation rate of the row of memory decreases; and
delaying a decrease in the refresh rate for the row of memory and an adjacent row of memory for a period of time.

### Claim 9 (depends on 8)

The method of claim 8, wherein determining that the activated rate of the row of memory is approaching the rate of activation at which other rows of the memory are impacted comprises determining that an activate count has reached a predetermined threshold of activation in a period of time.

### Claim 10 (depends on 8)

The method of claim 8, wherein adjusting the refresh rate for the row of memory and the adjacent row of memory comprises increasing a refresh rate for a region including the row of memory and the adjacent row of memory by a preset factor until the activated rate of the row of memory decreases to a predetermined threshold of activation.

### Claim 11 (depends on 8)

The method of claim 8, wherein adjusting the refresh rate for the row of memory and the adjacent row of memory comprises adjusting a refresh rate for a region of the memory device including the row of memory.

### Claim 12 (depends on 8)

The method of claim 8, wherein adjusting the refresh rate for a region which contains the row of memory and the adjacent row of memory comprises adjusting the refresh rate for the region for a period of time after the activated rate of the row of memory decreases.

### Claim 13

A system comprising:
a memory device; and
a memory controller coupled to the memory device, the memory controller to:
detect aggressor rows prior to a row hammer error occurring to mitigate effects of the row hammer error, wherein the aggressor rows are rows of the memory that are determined to receive a predetermined number of activations within a period of time;
adjust, and in response to the detecting aggressor rows, a refresh rate of a row of memory and an adjacent row of memory for a period of time in response to a determination that an activated rate of the row of memory approaches a rate of activation at which other rows of the memory are impacted.

### Claim 14 (depends on 13)

The system of claim 13, wherein the period of time is determined based upon a length of time the activated rate of the row of memory remains above a threshold rate of activation after approaching the rate of activation at which other rows of the memory are impacted.

### Claim 15 (depends on 13)

The system of claim 13, wherein the memory controller is to increase the refresh rate of the row of memory and the adjacent row of memory until the activated rate of the row of memory decreases below a threshold rate of activation for a period of time.