# US 10,373,552 B2 · Display device having a multilayer wiring structure including a wiring in a lower electrode layer

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- Number: US 10,373,552 B2
- Document ID: US10373552B2
- Status: Granted
- Kind: B2
- Application number: 13/767,899
- Filed: 2013-02-15
- Published: 2013-06-13
- Granted: 2019-08-06
- Earliest claimed: 2008-01-16
- Assignees: Sony Corporation
- Applicants: Sony Corporation
- Inventors: Junichi Yamashita; Katsuhide Uchino
- Web page: https://patentgrep.com/patent/US10373552B2

## CPC

- G09G 3/3225: using an active matrix
- G09G 3/30: using electroluminescent panels
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3266: Details of drivers for scan electrodes
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0439: Pixel structures
- G09G 2300/0465: Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
- G09G 2300/08: Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0866: by means of changes in the pixel supply voltage
- G09G 2310/0256: with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
- G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
- G09G 2310/06: Details of flat display driving waveforms
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

Any one of a write scanning line, a power source supply line, and a video signal line is structured as a subsidiary wiring disposed in the same layer as that having a lower electrode disposed therein. The subsidiary wiring is used in the power source supply line through which a power source drive pulse to be pulse-driven is transmitted, or other wirings (such as the write scanning line and the video signal line).

## Claims

### Claim 1

A display device comprising:
a signal line in a first layer, the signal line extends in a signal line direction;
a scanning line in a second layer that is different from the first layer, the scanning line extends in a direction that is orthogonal to the signal line direction;
an electro-optic element that includes an organic layer between an upper electrode and a lower electrode, the lower electrode is in a third layer;
a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer;
a transistor that is switchable between electrically connecting wiring to a supply line and electrically disconnecting the wiring from the supply line, the wiring electrically connects the lower electrode to the transistor; and
a plate of a storage capacitor in the first layer, the plate of the storage capacitor is a gate electrode of a drive transistor,
wherein the electro-optic element covers the wiring in a top plan view of the display device,
wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the wiring electrically connects the source region to the lower electrode, and
wherein the channel region is another plate of the storage capacitor.

### Claim 2

A display device comprising: an electro-optic element that covers interlayer wiring in a top plan view of the display device, the electro-optic element includes an organic layer between an upper electrode and a lower electrode;
a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer; and
a plate of a storage capacitor in the first wiring layer,
wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the interlayer wiring electrically connects the source region to the lower electrode, and
wherein the plate of the storage capacitor is a gate electrode of a drive transistor, the channel region is another plate of the storage capacitor.

### Claim 3 (depends on 2)

The display device of claim 2, wherein the drive transistor is switchable between electrically connecting the interlayer wiring to a supply line and electrically disconnecting the interlayer wiring from the supply line.

### Claim 4 (depends on 2)

The display device of claim 2, further comprising:
a plate of a first subsidiary capacitor in the first wiring layer, the drain region is another plate of the first subsidiary capacitor.

### Claim 5 (depends on 4)

The display device of claim 4, further comprising:
a plate of a second subsidiary capacitor in the insulating layer, the drain region is another plate of the second subsidiary capacitor.

### Claim 6 (depends on 5)

The display device of claim 5, wherein the plate of the first subsidiary capacitor is electrically connected directly to the plate of the second subsidiary capacitor.

### Claim 7 (depends on 5)

The display device of claim 5, wherein the plate of the second subsidiary capacitor is electrically connected directly to the upper electrode.

### Claim 8 (depends on 2)

The display device of claim 2, wherein the electro-optic element is configured to emit light.

### Claim 9 (depends on 2)

The display device of claim 2, wherein the upper electrode is electrically connected directly to ground.

### Claim 10 (depends on 2)

The display device of claim 2, wherein the lower electrode is an anode electrode and the upper electrode is a cathode electrode.

### Claim 11 (depends on 2)

The display device of claim 2, wherein a pixel circuit includes the electro-optic element and the transistor layer.