# US 10,373,370 B2 · Method, apparatus, and computer program product for improved graphics performance

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- Number: US 10,373,370 B2
- Document ID: US10373370B2
- Status: Granted
- Kind: B2
- Application number: 15/396,569
- Filed: 2016-12-31
- Published: 2017-04-20
- Granted: 2019-08-06
- Earliest claimed: 2008-01-29
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Jon N. Hasselgren; Jacob J. Munkberg; Franz Petrik Clarberg; Tomas G. Akenine-Moller
- Web page: https://patentgrep.com/patent/US10373370B2

## CPC

- G06T 15/405: {using Z-buffer}
- G06T 1/60: Memory management
- G06T 15/005: {General purpose rendering architectures}
- G06T 15/40: Hidden part removal
- G06T 15/80: Shading
- G06T 2200/24: involving graphical user interfaces [GUIs]
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.

## Claims

### Claim 1

A graphics processing unit comprising:
first circuitry to determine a first bounding region for a first set of graphics primitives, wherein the first bounding region is to enclose one or more of the first set of graphics primitives;
second circuitry to perform back-face culling on the first set of graphics primitives based on the first bounding region, wherein some of the first set of graphics primitives are removed as a result of the back-face culling to generate a second set of graphics primitives;
third circuitry to perform tessellation of the second set of graphics primitives to generate a third set of graphics primitives;
fourth circuitry to determine whether one or more of the third set of graphics primitives overlap at least a first tile of a plurality of image tiles of an image frame, the fourth circuitry to identify a fourth set of graphics primitives which contribute to image data within the first tile;
fifth circuitry to perform vertex shading on input vertices of one or more of the fourth set of graphics primitives to generate output vertices having modified positional attributes; and
sixth circuitry to generate output pixels based on the output vertices;
a frame buffer to store the output pixels;
wherein the first circuitry, the second circuitry, the third circuitry, the fourth circuitry, fifth circuitry, and sixth circuitry are integrated within one or more processing elements configured to execute graphics commands.

### Claim 2 (depends on 1)

The graphics processing apparatus as in claim 1 further comprising:
a depth buffer to store depth data associated with one or more of the output pixels.

### Claim 3 (depends on 2)

The graphics processing apparatus as in claim 2 further comprising:
depth test circuitry to perform depth testing of a current pixel using depth data stored in the depth buffer.

### Claim 4 (depends on 1)

The graphics processing apparatus as in claim 1 wherein the fourth circuitry is to cull graphics primitives that do not contribute to image data within the first tile to generate the fifth set of graphics primitives.

### Claim 5 (depends on 1)

The graphics processing apparatus as in claim 1 wherein positional bounds of the first bounding volume are tested against planes of a view to determine whether to cull one or more of the first set of graphics primitives based on the view.

### Claim 6 (depends on 1)

The graphics processing apparatus as in claim 1 wherein said fifth circuitry is to select at least one vertex from a primitive, execute a set of instructions associated with a vertex position determination for the at least one vertex, provide a new representation of the at least one vertex, and cull the new representation of the at least one vertex.

### Claim 7

A method comprising:
determining a first bounding region for a first set of graphics primitives, wherein the first bounding region is to enclose one or more of the first set of graphics primitives;
performing back-face culling on the first set of graphics primitives based on the first bounding region, wherein some of the first set of graphics primitives are removed as a result of the back-face culling to generate a second set of graphics primitives;
performing tessellation of the second set of graphics primitives to generate a third set of graphics primitives;
determining whether one or more of the third set of graphics primitives overlap at least a first tile of a plurality of image tiles of an image frame to identify a fourth set of graphics primitives which contribute to image data within the first tile;
performing vertex shading on input vertices of one or more of the fourth set of graphics primitives to generate output vertices having modified positional attributes; and
generating output pixels based on the output vertices; and
storing the output pixels in a frame buffer;
wherein the operations of determining a first bounding region, performing back-face culling, performing tessellation, determining one or more of a fourth set of graphics primitives overlap at least a first tile, performing vertex shading, generating output pixels, and storing the output pixels are performed by one or more processing elements configured to execute graphics commands.

### Claim 8 (depends on 7)

The method as in claim 7 further comprising:
storing depth data associated with one or more of the output pixels in a depth buffer.

### Claim 9 (depends on 8)

The method as in claim 8 further comprising:
performing depth testing of a current pixel using depth data stored in the depth buffer.

### Claim 10 (depends on 7)

The method as in claim 7 further comprising:
culling graphics primitives that do not contribute to image data within the first tile to generate the fifth set of graphics primitives.

### Claim 11 (depends on 7)

The method as in claim 7 wherein positional bounds of the first bounding volume are tested against planes of a view to determine whether to cull one or more of the first set of graphics primitives based on the view.

### Claim 12 (depends on 7)

The method as in claim 7 further comprising:
selecting at least one vertex from a primitive,
executing a set of instructions associated with a vertex position determination for the at least one vertex,
providing a new representation of the at least one vertex, and
culling the new representation of the at least one vertex.

### Claim 13

A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:
determining a first bounding region for a first set of graphics primitives, wherein the first bounding region is to enclose one or more of the first set of graphics primitives;
performing back-face culling on the first set of graphics primitives based on the first bounding region, wherein some of the first set of graphics primitives are removed as a result of the back-face culling to generate a second set of graphics primitives;
performing tessellation of the second set of graphics primitives to generate a third set of graphics primitives;
determining whether one or more of the third set of graphics primitives overlap at least a first tile of a plurality of image tiles of an image frame to identify a fourth set of graphics primitives which contribute to image data within the first tile;
performing vertex shading on input vertices of one or more of the fourth set of graphics primitives to generate output vertices having modified positional attributes; and
generating output pixels based on the output vertices; and
storing the output pixels in a frame buffer;
wherein the operations of determining a first bounding region, performing back-face culling, performing tessellation, determining one or more of a fourth set of graphics primitives overlap at least a first tile, performing vertex shading, generating output pixels, and storing the output pixels are performed by one or more processing elements configured to execute graphics commands.

### Claim 14 (depends on 13)

The machine-readable medium as in claim 13 further comprising program code to cause the machine to perform the operations of:
storing depth data associated with one or more of the output pixels in a depth buffer.

### Claim 15 (depends on 14)

The machine-readable medium as in claim 14 further comprising program code to cause the machine to perform the operations of:
performing depth testing of a current pixel using depth data stored in the depth buffer.

### Claim 16 (depends on 13)

The machine-readable medium as in claim 13 further comprising program code to cause the machine to perform the operations of:
culling graphics primitives that do not contribute to image data within the first tile to generate the fifth set of graphics primitives.

### Claim 17 (depends on 13)

The machine-readable medium as in claim 13 wherein positional bounds of the first bounding volume are tested against planes of a view to determine whether to cull one or more of the first set of graphics primitives based on the view.

### Claim 18 (depends on 13)

The machine-readable medium as in claim 13 further comprising program code to cause the machine to perform the operations of:
selecting at least one vertex from a primitive,
executing a set of instructions associated with a vertex position determination for the at least one vertex,
providing a new representation of the at least one vertex, and
culling the new representation of the at least one vertex.

### Claim 19

A system comprising:
a system memory to store graphics instructions and data; and
a graphics processing unit comprising:
first circuitry to determine a first bounding region for a first set of graphics primitives, wherein the first bounding region is to enclose one or more of the first set of graphics primitives;
second circuitry to perform back-face culling on the first set of graphics primitives based on the first bounding region, wherein some of the first set of graphics primitives are removed as a result of the back-face culling to generate a second set of graphics primitives;
third circuitry to perform tessellation of the second set of graphics primitives to generate a third set of graphics primitives;
fourth circuitry to determine whether one or more of the third set of graphics primitives overlap at least a first tile of a plurality of image tiles of an image frame, the fourth circuitry to identify a fourth set of graphics primitives which contribute to image data within the first tile;
fifth circuitry to perform vertex shading on input vertices of one or more of the fourth set of graphics primitives to generate output vertices having modified positional attributes; and
sixth circuitry to generate output pixels based on the output vertices;
a frame buffer to store the output pixels;
wherein the first circuitry, the second circuitry, the third circuitry, the fourth circuitry, fifth circuitry, and sixth circuitry are integrated within one or more processing elements configured to execute graphics commands.

### Claim 20 (depends on 19)

The system as in claim 19 further comprising:
a central processing unit (CPU) communicatively coupled to the graphics processing unit.

### Claim 21 (depends on 20)

The system as in claim 20 further comprising:
a network interface to connect the graphics processing unit and CPU to a network.

### Claim 22 (depends on 20)

The system as in claim 20 further comprising:
an input/output (TO) interface to couple the CPU and graphics processing unit to one or more other system components.

### Claim 23 (depends on 20)

The system as in claim 20 further comprising:
a persistent storage device coupled to the CPU and graphics processing unit to store program code and data.

### Claim 24 (depends on 19)

The system as in claim 19 wherein the system memory comprises a random access memory (RAM).

### Claim 25 (depends on 19)

The system as in claim 19 further comprising:
a display adapter to couple the system to an external monitor.
