# US 10,372,960 B2 · Capacitance detecting sensors and related devices and systems

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,372,960 B2
- Document ID: US10372960B2
- Status: Granted
- Kind: B2
- Application number: 15/333,005
- Filed: 2016-10-24
- Published: 2017-04-27
- Granted: 2019-08-06
- Earliest claimed: 2015-10-23
- Assignees: Shenzhen Goodix Technology Co., Ltd.
- Applicants: Shenzhen Goodix Technology Co., Ltd.
- Inventors: Chung-Yi Wang; Meng-Ta Yang
- Web page: https://patentgrep.com/patent/US10372960B2

## CPC

- G06V 40/1306: {non-optical, e.g. ultrasonic or capacitive sensing}
- G06F 3/044: by capacitive means
- G06V: IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Capacitance detecting circuit is disclosed for fingerprint sensing and other applications. The capacitance detecting circuit includes a first capacitor, an integrator, a second capacitor, a comparator, and a counter. The integrator can generate an integrating output voltage and includes a first single-ended amplifier and at least one integration capacitor. The first single-ended amplifier includes a first input terminal and an integrating output terminal. The comparator can generate a comparing output and include a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier, a positive input terminal to receive a reference voltage, and a comparing output terminal to output the comparing output voltage. The counter is coupled to the comparing output terminal and can generate a counter output. A connection between the second capacitor and the first input terminal is controlled to be conducted or cutoff according to the comparing output.

## Claims

### Claim 1

A capacitance detecting circuit, comprising:
a pixel sensing circuit that includes a sensing conducting layer that interfaces with an object to form a capacitance with the object;
a first capacitor coupled to the pixel sensing circuit;
an integrator electrically coupled to the first capacitor and configured to generate an integrating output voltage, the integrator including:
a first single-ended amplifier, including:
an integrating output terminal configured to output the integrating output voltage, and
a first input terminal coupled to the first capacitor, and
at least one integration capacitor coupled to the first input terminal;
a comparator coupled to the integrating output terminal of the first single-ended amplifier and configured to generate a comparing output voltage indicative of the capacitance between the sensing conducting layer and the object;
a first switch coupled to the first capacitor to a ground;
a second capacitor;
a second switch between the second capacitor and the first input terminal of the integrator, wherein the second switch is configured to turn on and off based on the comparing output voltage from the comparator to provide an electrical connection between the second capacitor and the integrator.

### Claim 2 (depends on 1)

The capacitance detecting circuit of claim 1, wherein the comparator includes:
a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier;
a positive input terminal configured to receive a reference voltage; and
a comparing output terminal configured to output the comparing output voltage.

### Claim 3 (depends on 2)

The capacitance detecting circuit of claim 2, comprising:
a counter coupled to the comparing output terminal and configured to generate a counter output.

### Claim 4 (depends on 1)

The capacitance detecting circuit of claim 1, comprising:
a third switch to couple the second capacitor to a voltage generator; and
a fourth switch to couple the second capacitor to a ground,
wherein the second switch and the fourth switch are controlled to be ON when the comparing output indicates that the integrating output voltage is smaller than the reference voltage.

### Claim 5 (depends on 1)

The capacitance detecting circuit of claim 1, wherein the integrator further comprises:
a reset switch coupled between the first input terminal and the integrating output terminal,
wherein the reset switch is controlled to conduct an electrical connection between the first input terminal and the integrating output terminal.

### Claim 6 (depends on 1)

The capacitance detecting circuit of claim 1, wherein the integrator comprises at least one integrating switching unit coupled between the at least one integration capacitor and the integrating output terminal.

### Claim 7 (depends on 1)

The capacitance detecting circuit of claim 1, wherein the pixel sensing circuit comprises:
a second conducting layer formed below the sensing conducting layer to form a capacitance with the sensing conducting layer.

### Claim 8 (depends on 1)

A system equipped with a fingerprint sensor, comprising:
a fingerprint sensor to capture a portion of a user's fingerprint pattern based on capacitive sensing, the fingerprint sensor including a capacitance detecting circuit as in claim 1;
a fingerprint processing processor coupled to receive information of a user fingerprint captured by the fingerprint sensor to determine whether the captured user fingerprint is from an authorized user; and
a device coupled to the fingerprint processing processor, wherein an access to the device is controlled by the fingerprint processor based on whether the captured user fingerprint is from an authorized user.

### Claim 9

A capacitance detecting circuit, comprising:
a pixel sensing circuit that includes a sensing conducting layer that interfaces with an object to form a capacitance with the object;
a first capacitor coupled to the pixel sensing circuit;
an integrator electrically coupled to the first capacitor and configured to generate an integrating output voltage, the integrator including:
a first single-ended amplifier, including:
an integrating output terminal configured to output the integrating output voltage, and
a first input terminal coupled to the first capacitor, and
at least one integration capacitor coupled to the first input terminal; and
a comparator coupled to the integrating output terminal of the first single-ended amplifier and configured to generate a comparing output voltage indicative of the capacitance between the sensing conducting layer and the object;
wherein the integrator further comprises at least one integrating switching unit coupled between the at least one integration capacitor and the integrating output terminal, and
wherein the at least one integrating switching unit is coupled to a voltage generator or a ground.

### Claim 10 (depends on 9)

The capacitance detecting circuit of claim 9, wherein the first capacitor is coupled to a ground via a first switch.

### Claim 11 (depends on 9)

The capacitance detecting circuit of claim 9, wherein the at least one integrating switching unit is configured to selectively conduct electrical connections between the at least one integration capacitor and the integrating output terminal, connections between the at least one integration capacitor and the voltage generator, or connections between the at least one integration capacitor and the ground.

### Claim 12 (depends on 9)

The capacitance detecting circuit of claim 9, wherein the comparator includes:
a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier;
a positive input terminal configured to receive a reference voltage; and
a comparing output terminal configured to output the comparing output voltage.

### Claim 13 (depends on 12)

The capacitance detecting circuit of claim 12, comprising:
a counter coupled to the comparing output terminal and configured to generate a counter output.

### Claim 14 (depends on 9)

The capacitance detecting circuit of claim 9, wherein the integrator further comprises:
a reset switch coupled between the first input terminal and the integrating output terminal,
wherein the reset switch is controlled to conduct an electrical connection between the first input terminal and the integrating output terminal.

### Claim 15 (depends on 9)

The capacitance detecting circuit of claim 9, wherein the pixel sensing circuit comprises:
a second conducting layer formed below the sensing conducting layer to form a capacitance with the sensing conducting layer.

### Claim 16 (depends on 9)

A system equipped with a fingerprint sensor, comprising:
a fingerprint sensor to capture a portion of a user's fingerprint pattern based on capacitive sensing, the fingerprint sensor including a capacitance detecting circuit as in claim 9;
a fingerprint processing processor coupled to receive information of a user fingerprint captured by the fingerprint sensor to determine whether the captured user fingerprint is from an authorized user; and
a device coupled to the fingerprint processing processor, wherein an access to the device is controlled by the fingerprint processor based on whether the captured user fingerprint is from an authorized user.

### Claim 17 (depends on 16)

The system as in claim 16, wherein the device coupled to the fingerprint processing processor includes a smart phone, a portable device, a database system, a computer system, or an automobile.

### Claim 18

A capacitance detecting circuit, comprising:
a pixel sensing circuit that includes a sensing conducting layer that interfaces with an object to form a capacitance with the object;
a first capacitor coupled to the pixel sensing circuit;
an integrator electrically coupled to the first capacitor and configured to generate an integrating output voltage, the integrator including;
a first single-ended amplifier, including:
an integrating output terminal configured to output the integrating output voltage, and
a first input terminal coupled to the first capacitor, and
at least one integration capacitor coupled to the first input terminal;
a comparator coupled to the integrating output terminal of the first single-ended amplifier and configured to generate a comparing output voltage indicative of the capacitance between the sensing conducting layer and the object;
wherein the integrator further comprises at least one integrating switching unit coupled between the at least one integration capacitor and the integrating output terminal; and
a common mode voltage generator configured to generate a common mode voltage, the common mode voltage generator comprising:
a second single-ended amplifier comprising:
a second input terminal; and
a second output terminal coupled to be a part of the at least one integrating switching unit and the second input terminal via a connecting switch; and
a plurality of common mode capacitors coupled to the second input terminal.

### Claim 19 (depends on 18)

The capacitance detecting circuit of claim 18, wherein the common mode voltage generator further comprises a plurality of common mode switching units coupled between the plurality of common mode capacitors and the second output terminal.

### Claim 20 (depends on 19)

The capacitance detecting circuit of claim 19, wherein the plurality of common mode switching units are coupled to a voltage generator or a ground.

### Claim 21 (depends on 20)

The capacitance detecting circuit of claim 20, wherein the plurality of common mode switching units are controlled to selectively conduct connections between the plurality of common mode capacitors and the second output terminal, connections between the plurality of common mode capacitors and the voltage generator, or connections between the plurality of common mode capacitors and the ground.

### Claim 22 (depends on 18)

The capacitance detecting circuit of claim 18, further comprising an analog to digital converter (ADC) coupled to the integrating output terminal and the second output terminal and configured to generate an ADC output.

### Claim 23 (depends on 22)

The capacitance detecting circuit of claim 22, wherein the capacitance detecting circuit is configured to generate an overall output by combining the counter output and the ADC output.

### Claim 24 (depends on 18)

A system equipped with a fingerprint sensor, comprising:
a fingerprint sensor to capture a portion of a user's fingerprint pattern based on capacitive sensing, the fingerprint sensor including a capacitance detecting circuit as in claim 18;
a fingerprint processing processor couple to receive information of a user fingerprint captured by the fingerprint sensor to determined whether the captured user fingerprint is from an authorized user; and
a device coupled to the fingerprint processing processor, wherein an access to the device is controlled by the fingerprint processor based on whether the captured user fingerprint is from an authorized user.

### Claim 25 (depends on 24)

The system as in claim 24, wherein the device coupled to the fingerprint processing processor includes a smart phone, a portable device, a database system, a computer system, or an automobile.

### Claim 26

A fingerprint identification system, comprising:
a plurality of pixel sensing circuits at different locations to interface with a finger to capture at least a portion of a fingerprint of the finger;
a capacitance detecting circuit coupled to the plurality of pixel sensing circuits and configured to generate a plurality of capacitance outputs corresponding to the plurality of pixel sensing circuits, the capacitance detecting circuit comprising:
a first capacitor;
an integrator configured to generate an integrating output voltage, comprising:
a first single-ended amplifier, comprising:
an integrating output terminal configured to output the integrating output voltage; and
a first input terminal coupled to the first capacitor; and
at least one integration capacitor coupled to the first input terminal;
a second capacitor;
a comparator configured to generate a comparing output, the comparator comprising:
a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier;
a positive input terminal configured to receive a reference voltage; and
a comparing output terminal configured to output the comparing output; and
a counter coupled to the comparing output terminal and configured to generate a plurality of counter outputs corresponding to the plurality of pixel sensing circuits as the plurality of capacitance outputs; and
a fingerprint determining module coupled to the capacitance detecting circuit and configured to determine a location of each pixel sensing circuit corresponding to a finger ridge or a finger valley based on the corresponding capacitance output;
wherein a connection between the second capacitor and the first input terminal is controlled to be turned ON or OFF based on the comparing output.

### Claim 27 (depends on 26)

The fingerprint identification system of claim 26, comprising:
a first switch to couple the first capacitor to a ground.

### Claim 28 (depends on 26)

The fingerprint identification system of claim 26, comprising;
a second switch to couple the second capacitor to the first input terminal;
a third switch to couple the second capacitor to a voltage generator; and
a fourth switch to couple the second capacitor to a ground;
wherein the second switch and the fourth switch are controlled to be turned ON when the comparing output indicates that the integrating output voltage is smaller than the reference voltage.

### Claim 29 (depends on 28)

The fingerprint identification system of claim 28, wherein each pixel sensing circuit comprises:
a first conducting layer coupled to a voltage generator via a fifth switch and a ground via a sixth switch; and
a second conducting layer coupled to the voltage generator via a seventh switch and the first capacitor via an eighth switch.

### Claim 30 (depends on 26)

The fingerprint identification system of claim 26, wherein the integrator further comprises:
a reset switch coupled between the first input terminal and the integrating output terminal,
wherein the reset switch is controlled to conduct a connection between the first input terminal and the integrating output terminal.

### Claim 31 (depends on 26)

The fingerprint identification system of claim 26, wherein the integrator comprises:
at least one integrating switching unit coupled between the at least one integration capacitor and the integrating output terminal.

### Claim 32 (depends on 31)

The fingerprint identification system of claim 31, wherein the at least one integrating switching unit is coupled to a voltage generator or a ground.

### Claim 33 (depends on 32)

The fingerprint identification system of claim 32, wherein the at least one integrating switching unit is controlled to selectively conduct connections between the at least an integration capacitor and the voltage generator, or connections between the at least an integration capacitor and the ground.

### Claim 34 (depends on 33)

The fingerprint identification system of claim 33, further comprising a common mode voltage generator to generate a common mode voltage, the common mode voltage generator comprising:
a second single-ended amplifier comprising:
a second input terminal; and
a second output terminal coupled to a part of the at least one integrating switching units and the second input terminal via a connecting switch; and
a plurality of common mode capacitors coupled to the second input terminal.

### Claim 35 (depends on 34)

The fingerprint identification system of claim 34, wherein the common mode voltage generator further comprises a plurality of common mode switching units coupled between the plurality of common mode capacitors and the second output terminal.

### Claim 36 (depends on 35)

The fingerprint identification system of claim 35, wherein the plurality of common mode switching units are coupled to a voltage generator or a ground.

### Claim 37 (depends on 36)

The fingerprint identification system of claim 36, wherein the plurality of common mode switching units are controlled to selectively conduct connections between the plurality of common mode capacitors and the second output terminal, connections between the plurality of common mode capacitors and the voltage generator, or connections between the plurality of common mode capacitors and the ground.

### Claim 38 (depends on 34)

The fingerprint identification system of claim 34, further comprising an analog to digital converter (ADC) coupled to the integrating output terminal and the second output terminal and configured to generate a plurality of ADC outputs.

### Claim 39 (depends on 38)

The fingerprint identification system of claim 38, wherein the capacitance detecting circuit generates a plurality of overall outputs as the plurality of capacitance outputs by combining the plurality of counter outputs and the plurality of ADC outputs.

### Claim 40

A capacitance detecting circuit, comprising:
a first capacitor, comprising a first end coupled to a pixel sensing circuit and a second end;
an integrator;
a first switch coupled between the first end of the first capacitor and a ground;
a second switch coupled between the second end of the first capacitor and the integrator; and
a conducting layer coupled to the voltage generator via a fifth switch and the first capacitor via a sixth switch.

### Claim 41 (depends on 40)

The capacitance detecting circuit of claim 40, wherein the pixel sensing circuit comprises:
another conducting layer coupled to a voltage generator via a third switch and the ground via a fourth switch.

### Claim 42 (depends on 41)

The capacitance detecting circuit of claim 41, wherein the integrator comprises:
an amplifier comprising:
a positive input terminal configured to received the reference voltage;
a negative input terminal coupled to the second switch; and
an output terminal;
an integrating capacitor, coupled between the negative input terminal and the output terminal of the amplifier; and
a reset switch, coupled between the negative input terminal and the output terminal of the amplifier.

### Claim 43

A capacitance detecting circuit, comprising:
a pixel sensing circuit that interfaces with an object to form a capacitance with the object;
a first capacitor, coupled to the pixel sensing circuit;
an integrator electrically coupled to the first capacitor and configured to generate an integrating output voltage, the integrator including:
a first single-ended amplifier, including:
an integrating output terminal configured to output the integrating output voltage, and
a first input terminal coupled to the first capacitor, and
at least one integration capacitor coupled to the first input terminal;
an array of capacitors, one terminal of each capacitor in the array being switched to a predetermined voltage or switched open; and
a comparator coupled to the integrating output terminal of the first single-ended amplifier and configured to generate a comparing output voltage indicative of the capacitance between the pixel sensing circuit and the object.

### Claim 44 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the comparator includes:
a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier;
a positive input terminal configured to receive a common mode voltage; and
a comparing output terminal configured to output the comparing output voltage.

### Claim 45 (depends on 44)

The capacitance detecting circuit of claim 44, comprising:
a counter coupled to the comparing output terminal and configured to generate a counter output.

### Claim 46 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the first capacitor is coupled to a ground via a first switch.

### Claim 47 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the other terminal of each capacitor in the array of capacitors is connected to
a VDD switch to couple the other terminal to a voltage generator; and
a ground switch to couple the other terminal to a ground,
wherein the VDD switch and the ground switch are controlled to be ON when the comparing output indicates that the integrating output voltage is smaller than the reference voltage.

### Claim 48 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the integrator further comprises:
a reset switch coupled between the first input terminal and the integrating output terminal,
wherein the reset switch is controlled to conduct an electrical connection between the first input terminal and the integrating output terminal.

### Claim 49 (depends on 43)

The capacitance detecting circuit of claim 43, further comprising a common mode voltage generator configured to generate the common mode voltage, the common mode voltage generator comprising:
a second singled-ended amplifier comprising:
a second input terminal; and
a second output terminal coupled to a part of the at least one integrating switching unit and the second input terminal via a connecting switch; and
a plurality of common mode capacitors coupled to the second input terminal.

### Claim 50 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the array of capacitors is configured to provide a course quantization of the detected capacitance and a fine quantization of the detected capacitance.

### Claim 51 (depends on 50)

The capacitance detecting circuit of claim 50, wherein the capacitance detecting circuit is configured to generate an overall output by combining the course quantization and the fine quantization of the capacitance.

### Claim 52 (depends on 43)

The capacitance detecting circuit of claim 43, wherein the pixel sensing circuit comprises:
a first top conducting layer that interfaces with the object to form the capacitance with the object to be measured and coupled to a voltage generator via a first switch and a ground via a second switch; and
a second conducting layer formed below the first top conducting layer to form a capacitance with the first top conducting layer and coupled to the voltage generator via a third switch and the first capacitor via a fourth switch.

### Claim 53 (depends on 8)

The system as in claim 8, wherein the device coupled to the fingerprint processing processor includes a smart phone, a portable device, a database system, a computer system, or an automobile.
