# US 10,372,871 B2 · IC layout post-decomposition mask allocation optimization > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,372,871 B2 - Document ID: US10372871B2 - Status: Granted - Kind: B2 - Application number: 15/662,419 - Filed: 2017-07-28 - Published: 2019-01-31 - Granted: 2019-08-06 - Earliest claimed: 2017-07-28 - Assignees: Globalfoundries Inc. - Applicants: Globalfoundries Inc. - Inventors: Lynn Tao-Ning Wang; Sriram Madhavan - Web page: https://patentgrep.com/patent/US10372871B2 ## CPC - G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) - G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes - G03F 1/70: Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging - G03F 1/72: Repair or correction of mask defects - G06F 2119/18: Manufacturability analysis or optimisation for manufacturability - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G) ## Abstract An IC design layout is decomposed into multiple masks to produce an initial output. A post-decomposition optimization is performed. The post-decomposition optimization includes identifying hotspots in the multiple masks, clustering features that contribute to the hotspots into clusters, identifying ones of the clusters that can be relocated to a different mask to eliminate the hotspot, without violating design rules, as reversible clusters, ranking movement of the reversible clusters by comparing the reversible clusters, as potentially moved, to known manufacturability metrics, and moving the reversible clusters to different masks according to the priority established by the ranking, to produce a post-decomposition optimized tape-out. The IC devices are manufactured by applying the post-decomposition optimized tape-out to manufacturing equipment. ## Claims ### Claim 1 A method comprising: receiving an integrated circuit (IC) design layout; performing a decomposition of the IC design layout into multiple masks to produce an initial output; performing a post-decomposition optimization comprising: identifying hotspots in the multiple masks; clustering features that contribute to the hotspots into clusters; identifying ones of the clusters that can be relocated to a different mask to eliminate the hotspot, without violating design rules, as reversible clusters; ranking movement of the reversible clusters by comparing the reversible clusters, as potentially moved, to known manufacturability metrics; and moving the reversible clusters to different masks according to a priority established by the ranking, to produce a post-decomposition optimized tape-out; and manufacturing IC devices by applying the post-decomposition optimized tape-out to manufacturing equipment. ### Claim 2 (depends on 1) The method according to claim 1, the ranking is based on which reversible clusters have less features, which reversible clusters provide more area balancing between the masks, or which reversible clusters provide more improvement in spacing between the features in the masks. ### Claim 3 (depends on 1) The method according to claim 1, the clustering combines connected and adjacent features that lack spacing for defect-free manufacturing. ### Claim 4 (depends on 1) The method according to claim 1, further comprising automatically, using an automated optical proximity correction (OPC) application, performing an optical proximity correction process on the multiple masks in the initial output after performing the post-decomposition optimization. ### Claim 5 (depends on 1) The method according to claim 1, the decomposition of the IC design layout is not repeated after, or during, the post-decomposition optimization. ### Claim 6 (depends on 1) The method according to claim 1, the design rules and the known manufacturability metrics, are specific to a given foundry in which the IC devices are manufactured. ### Claim 7 (depends on 1) The method according to claim 1, the multiple masks relate to the same area of the IC device that is manufactured, and are used at different points in a manufacturing process. ### Claim 8 A method comprising: receiving an integrated circuit (IC) design layout into an automated decomposition application operating on a computerized system; automatically, using the automated decomposition application, performing a decomposition of the IC design layout into multiple masks to produce an initial output; automatically, using an automated post-decomposition optimization application operating on the computerized system, performing a post-decomposition optimization comprising: identifying violation areas in the multiple masks that lack spacing for defect-free manufacturing and matching shapes in the multiple masks to known weak shapes, to identify hotspots in the multiple masks; clustering features that contribute to the hotspots into clusters; identifying ones of the clusters that can be relocated to a different mask to eliminate the hotspot, without violating design rules, as reversible clusters; ranking movement of the reversible clusters by comparing the reversible clusters, as potentially moved, to known manufacturability metrics; and moving the reversible clusters to different masks according to a priority established by the ranking, to produce a post-decomposition optimized tape-out; and manufacturing IC devices by applying the post-decomposition optimized tape-out to manufacturing equipment that is automatically controlled by the computerized system. ### Claim 9 (depends on 8) The method according to claim 8, the ranking is based on which reversible clusters have less features, which reversible clusters provide more area balancing between the masks, or which reversible clusters provide more improvement in spacing between the features in the masks. ### Claim 10 (depends on 8) The method according to claim 8, the clustering combines connected and adjacent features that lack spacing for defect-free manufacturing. ### Claim 11 (depends on 8) The method according to claim 8, further comprising automatically, using an automated optical proximity correction (OPC) application operating on the computerized system, performing an optical proximity correction process on the multiple masks in the initial output after the automated post-decomposition optimization application performs the post-decomposition optimization. ### Claim 12 (depends on 8) The method according to claim 8, the decomposition of the IC design layout is not repeated after, or during, the post-decomposition optimization. ### Claim 13 (depends on 8) The method according to claim 8, the design rules and the known manufacturability metrics, are specific to a given foundry in which the IC devices are manufactured. ### Claim 14 (depends on 8) The method according to claim 8, the multiple masks relate to the same area of the IC device that is manufactured, and are used at different points in a manufacturing process. ### Claim 15 A system comprising: a computerized device; an automated decomposition application operating on the computerized device, the automated decomposition application is capable of receiving an integrated circuit (IC) design layout, the automated decomposition application is capable of performing a decomposition of the IC design layout into multiple masks to produce an initial output; an automated post-decomposition optimization application operating on the computerized device, the automated post-decomposition optimization application is capable of performing a post-decomposition optimization comprising: identifying violation areas in the multiple masks that lack spacing for defect-free manufacturing and matching shapes in the multiple masks to known weak shapes, to identify hotspots in the multiple masks; clustering features that contribute to the hotspots into clusters; identifying ones of the clusters that can be relocated to a different mask to eliminate the hotspot, without violating design rules, as reversible clusters; ranking movement of the reversible clusters by comparing the reversible clusters, as potentially moved, to known manufacturability metrics; and moving the reversible clusters to different masks according to a priority established by the ranking, to produce a post-decomposition optimized tape-out; and a connection to manufacturing equipment that is automatically controlled to be capable of manufacturing IC devices by applying the post-decomposition optimized tape-out to the manufacturing equipment. ### Claim 16 (depends on 15) The system according to claim 15, the ranking is based on which reversible clusters have less features, which reversible clusters provide more area balancing between the masks, or which reversible clusters provide more improvement in spacing between the features in the masks. ### Claim 17 (depends on 15) The system according to claim 15, the clustering combines connected and adjacent features that lack spacing for defect-free manufacturing. ### Claim 18 (depends on 15) The system according to claim 15, further comprising an automated optical proximity correction (OPC) application capable of performing an optical proximity correction process on the multiple masks in the initial output after the automated post-decomposition optimization application performs the post-decomposition optimization. ### Claim 19 (depends on 15) The system according to claim 15, the decomposition of the IC design layout is not repeated after, or during, the post-decomposition optimization. ### Claim 20 (depends on 15) The system according to claim 15, the design rules and the known manufacturability metrics, are specific to a given foundry in which the IC devices are manufactured.