# US 10,372,865 B2 · System design based on unified chip specification

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- Number: US 10,372,865 B2
- Document ID: US10372865B2
- Status: Granted
- Kind: B2
- Application number: 15/356,543
- Filed: 2016-11-19
- Published: 2018-05-24
- Granted: 2019-08-06
- Earliest claimed: 2016-11-19
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Yang Liu; Yong Lu; Peng LM Shao; Jiang Yu
- Web page: https://patentgrep.com/patent/US10372865B2

## CPC

- G06F 30/39: Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347)
- G06F 30/394: Routing (G06F30/396 takes precedence)
- G06F 30/327: Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Disclosed aspects relate to facilitating system design based on unified chip specification. It can be determined based on the system design that a first interface of a first chip is to be connected to a second interface of a second chip. Then a first configuration of the first interface and a second configuration of the second interface are determined based on a unified specification. The unified specification at least specifies configurations of a plurality of chip interfaces for respective usages. A hardware design may be automatically generated based on the first and second configurations. The hardware design may include a hardware-level connection between the first and second interfaces.

## Claims

### Claim 1

A computer-implemented method comprising:
determining, based on a system design for a system, that a first interface of a first chip is to be connected to a second interface of a second chip;
determining a first configuration of the first interface based on a unified specification, the unified specification at least specifying configurations of a plurality of chip interfaces for respective usages;
determining a second configuration of the second interface based on the unified specification;
determining a first plurality of registers of the first interface and a second plurality of registers of the second interface involved in a hardware-level connection based on the unified specification;
configuring the first plurality of registers and the second plurality of registers based on the unified specification;
automatically generating a hardware design for the system based on the first and second configurations, the hardware design including the hardware-level connection between the first and second interfaces; and
automatically generating a schematic for the system based on the first and second configurations, the schematic including connections between a first plurality of pins of the first interface and a second plurality of pins of the second interface.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
performing, on the hardware design based on the unified specification, a selection which is selected from the group consisting of:
an input/output (I/O) electrical check,
an I/O combination check,
a strap pin configuration check, and
a protocol check.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
generating system firmware code based on the unified specification, the system firmware code, when executed, configuring the system.

### Claim 4 (depends on 3)

The method of claim 3, wherein generating the system firmware code comprises:
obtaining, from the unified specification, first built-in firmware code for the first chip;
obtaining, from the unified specification, second built-in firmware code for the second chip; and
generating the firmware code by integrating the first built-in firmware code and the second built-in firmware code.

### Claim 5 (depends on 4)

The method of claim 4, wherein at least one of the first built-in firmware code and the second built-in firmware code includes pseudo code.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
obtaining, from the unified specification, for the system a selection which is selected from the group consisting of:
a driver, and
an application programming interface (API).

### Claim 7

A device comprising:
a processing unit;
a memory coupled to the processing unit and storing instructions thereon, the instructions, when executed by the processing unit, performing operations including:
determining, based on a system design for a system, that a first interface of a first chip is to be connected to a second interface of a second chip;
determining a first configuration of the first interface based on a unified specification, the unified specification at least specifying configurations of a plurality of chip interfaces for respective usages;
determining a second configuration of the second interface based on the unified specification;
determining a first plurality of registers of the first interface and a second plurality of registers of the second interface involved in a hardware-level connection based on the unified specification;
configuring the first plurality of registers and the second plurality of registers based on the unified specification;
automatically generating a hardware design for the system based on the first and second configurations, the hardware design including the hardware-level connection between the first and second interfaces; and
automatically generating a schematic for the system based on the first and second configurations, the schematic including connections between a first plurality of pins of the first interface and a second plurality of pins of the second interface.

### Claim 8 (depends on 7)

The device of claim 7, wherein the operations further include:
performing, on the hardware design based on the unified specification, a selection which is selected from the group consisting of:
an input/output (I/O) electrical check,
an I/O combination check,
a strap pin configuration check, and
a protocol check.

### Claim 9 (depends on 7)

The device of claim 7, wherein the operations further include:
generating system firmware code based on the unified specification, the system firmware code, when executed, configuring the system.

### Claim 10 (depends on 9)

The device of claim 9, wherein generating the system firmware code comprises:
obtaining, from the unified specification, first built-in firmware code for the first chip;
obtaining, from the unified specification, second built-in firmware code for the second chip; and
generating the firmware code by integrating the first built-in firmware code and the second built-in firmware code.

### Claim 11 (depends on 10)

The device of claim 10, wherein at least one of the first built-in firmware code and the second built-in firmware code includes pseudo code.

### Claim 12 (depends on 7)

The device of claim 7, wherein the operations further include:
obtaining, from the unified specification, for the system a selection which is selected from the group consisting of:
a driver, and
an application programming interface (API).

### Claim 13

A computer program product being tangibly stored on a non-transient machine-readable medium and comprising machine-executable instructions, the instructions, when executed on a device, causing the device to:
determine, based on a system design for a system, that a first interface of a first chip is to be connected to a second interface of a second chip;
determine a first configuration of the first interface based on a unified specification, the unified specification at least specifying configurations of a plurality of chip interfaces for respective usages;
determine a second configuration of the second interface based on the unified specification;
determining a first plurality of registers of the first interface and a second plurality of registers of the second interface involved in a hardware-level connection based on the unified specification;
configuring the first plurality of registers and the second plurality of registers based on the unified specification;
automatically generate a hardware design for the system based on the first and second configurations, the hardware design including the hardware-level connection between the first and second interfaces; and
automatically generate a schematic for the system based on the first and second configurations, the schematic including connections between a first plurality of pins of the first interface and a second plurality of pins of the second interface.

### Claim 14 (depends on 13)

The computer program product of claim 13, wherein the instructions, when executed on the device, cause the device to:
perform, on the hardware design based on the unified specification, a selection which is selected from the group consisting of:
an input/output (I/O) electrical check,
an I/O combination check,
a strap pin configuration check, and
a protocol check.
