# US 10,372,857 B2 · Determining parameters of PCB structures > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,372,857 B2 - Document ID: US10372857B2 - Status: Granted - Kind: B2 - Application number: 15/138,858 - Filed: 2016-04-26 - Published: 2017-10-26 - Granted: 2019-08-06 - Earliest claimed: 2016-04-26 - Assignees: Hewlett Packard Enterprise Development LP - Applicants: Hewlett Packard Enterprise Development LP - Inventors: Benjamin Toby; Karl J. Bois - Web page: https://patentgrep.com/patent/US10372857B2 ## CPC - G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) - G06F 30/36: Circuit design at the analogue level - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract One example includes a machine-readable storage medium encoded with instructions. The instructions are executable by a processor of a system to cause the system to receive at least one target electrical characteristic indicating a target impedance of a passive printed circuit board (PCB) structure. The passive PCB structure is a component of a serial communication channel. The instructions are executable by the processor to cause the system to divide the passive PCB structure into a plurality of elements. Each element has an input and an output. The instructions are executable by the processor to cause the system to determine at least one parameter of each element such that an image impedance of the input and the output of each element equals the target impedance. ## Claims ### Claim 1 A machine-readable storage medium encoded with instructions, the instructions executable by a processor of a system to cause the system to: receive at least one target electrical characteristic indicating a target impedance of a passive printed circuit board (PCB) structure, the passive PCB structure being a component of a serial communication channel; divide the passive PCB structure into a plurality of elements, each element having an input and an output; and determine at least one parameter of each element such that an image impedance of the input and the output of each element equals the target impedance. ### Claim 2 (depends on 1) The machine-readable storage medium of claim 1, wherein the instructions are executable by the processor to further cause the system to: determine the at least one parameter of each element through electromagnetic simulation. ### Claim 3 (depends on 1) The machine-readable storage medium of claim 1, wherein the passive PCB structure comprises a via structure. ### Claim 4 (depends on 1) The machine-readable storage medium of claim 1, wherein the instructions are executable by the processor to further cause the system to: receive the at least one target electrical characteristic indicating the target impedance over an operational bandwidth; and determine the at least one parameter of each element such that the image impedance of the input and the output of each element equals the target impedance over the operational bandwidth. ### Claim 5 (depends on 1) The machine-readable storage medium of claim 1, wherein the instructions are executable by the processor to further cause the system to: divide at least one element of the plurality of elements into a plurality of sub-elements; and determine at least one parameter of each sub-element such that the image impedance of the input and the output of the at least one element divided into the plurality of sub-elements equals the target impedance. ### Claim 6 A method comprising: determining at least one target electrical characteristic indicating a target impedance over an operational bandwidth of a passive printed circuit board (PCB) structure, the passive PCB structure being a component of a serial communication channel; dividing the passive PCB structure into a plurality of elements, each element having an input and an output; and determining, using a processor, at least one parameter of each element such that an image impedance of the input and the output of each element equals the target impedance over the operational bandwidth. ### Claim 7 (depends on 6) The method of claim 6, wherein determining the at least one parameter of each element includes determining the at least one parameter through three-dimensional or two-dimensional simulation. ### Claim 8 (depends on 6) The method of claim 6, further comprising: dividing at least one element of the plurality of elements into a plurality of sub-elements; and determining at least one parameter of each sub-element such that the image impedance of the input and the output of the at least one element divided into the plurality of sub-elements equals the target impedance over the operational bandwidth. ### Claim 9 (depends on 6) The method of claim 6, wherein the passive PCB structure comprises a via or a plated through hole (PTH), a first pad electrically coupled to a first side of the via or the PTH, a first signal trace electrically coupled to the first pad, a second pad electrically coupled to a second side of the via or the PTH, and a second signal trace electrically coupled to the second pad. ### Claim 10 (depends on 6) The method of claim 6, further comprising: after determining the at least one parameter of each element of the plurality of elements, analyzing the passive PCB structure using full-wave analysis to identify non transverse electromagnetic (TEM) effects; and modifying at least one parameter of the passive PCB structure based on the results of the analysis to remove the non TEM effects. ### Claim 11 A method comprising: determining at least one target electrical characteristic indicating a target impedance of a printed circuit board (PCB) via structure, the PCB via structure being a component of a serial communication channel; dividing the PCB via structure into a plurality of elements, each element having an input and an output; and determining, using a processor, at least one parameter of each element such that an image impedance of the input and the output of each element equals the target impedance. ### Claim 12 (depends on 11) The method of claim 11, wherein dividing the PCB via structure into a plurality of elements comprises dividing the PCB via structure into at least a first horizontal pad element, a second horizontal pad element, and a vertical element between the first horizontal pad element and the second horizontal pad element. ### Claim 13 (depends on 12) The method of claim 12, further comprising: dividing the vertical element into a plurality of sub-elements, each sub-element having a sub-input and a sub-output; and determining at least one parameter of each sub-element such that an image impedance of the sub-input and the sub-output of each sub-element equals the target impedance. ### Claim 14 (depends on 11) The method of claim 11, wherein determining the at least one target electrical characteristic indicating the target impedance comprises determining the at least one target electrical characteristic indicating the target impedance over an operational bandwidth, and wherein determining the at least one parameter of each element comprises determining the at least one parameter of each element such that the image impedance of the input and the output of each element equals the target impedance over the operational bandwidth. ### Claim 15 (depends on 11) The method of claim 11, wherein determining the at least one parameter of each element comprises determining the at least one parameter of each element using two-dimensional simulation.