# US 10,372,532 B2 · Memory array and measuring and testing methods for inter-hamming differences of memory array > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,372,532 B2 - Document ID: US10372532B2 - Status: Granted - Kind: B2 - Application number: 15/677,414 - Filed: 2017-08-15 - Published: 2018-06-07 - Granted: 2019-08-06 - Earliest claimed: 2016-12-07 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Co., Ltd. - Inventors: Shih-Lien Linus Lu; Kun-Hsi Li; Saman M. I. Adham - Web page: https://patentgrep.com/patent/US10372532B2 ## CPC - G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature} - G01N 35/00594: {Quality control, including calibration or testing of components of the analyser} - G01N 35/00732: {Identification of carriers, materials or components in automatic analysers} - G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)} - G11C 29/50: Marginal testing, e.g. race, voltage or current testing - H03M 13/1575: {Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance} - H03M 13/19: Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes - G01N 2035/00782: {reprogrammmable code} - G11C 2029/5002: {Characteristic} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) - G11C: STATIC STORES (semiconductor memory devices H10B) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A memory device is provided. The memory device includes a memory array including a plurality of sections, and an inter-hamming difference analyzer. Each section includes a plurality of bits, and the numbers of the bits of the plurality of sections are the same. The inter-hamming difference analyzer is configured to obtain contents of the plurality of sections operating in different operating conditions, to obtain a plurality of inter-hamming differences of the contents, and to provide a maximum inter-hamming difference and a minimum inter-hamming difference among the inter-hamming differences of the plurality of sections. The inter-hamming difference represents the number of unlike bits between the content of one section corresponding to a first operating condition and the content of another section corresponding to a second operating condition that is different from the first operating condition. ## Claims ### Claim 1 A memory device, comprising: a memory array comprising a plurality of sections, wherein each section of the plurality of sections comprises a plurality of bits, and the numbers of the bits of the plurality of sections are the same; and an inter-hamming difference analyzer configured to obtain contents of the plurality of sections operating in different operating conditions, to obtain a plurality of inter-hamming differences of the contents, and to provide a maximum inter-hamming difference and a minimum inter-hamming difference among the inter-hamming differences of the plurality of sections, wherein the inter-hamming difference represents the number of unlike bits between the content of one section of the plurality of sections corresponding to a first operating condition and the content of another section of the plurality of sections corresponding to a second operating condition that is different from the first operating condition. ### Claim 2 (depends on 1) The memory device as claimed in claim 1, wherein the inter-hamming difference analyzer comprises: a storage device configured to store the contents of the plurality of sections corresponding to the first operating condition; and a comparator configured to determine the hamming differences between the content of a first section of the plurality of sections corresponding to the second operating condition and the contents of a plurality of sections other than the first section stored in the storage device. ### Claim 3 (depends on 2) The memory device as claimed in claim 2, wherein the storage device has the same capacity as the memory array. ### Claim 4 (depends on 3) The memory device as claimed in claim 3, wherein when the inter-hamming difference analyzer obtains a first content of the first section from the memory array operating in the second operating condition, the comparator determines the inter-hamming differences between the first content of the first section from the memory array and the contents of the plurality of sections except the first section from the storage device, wherein the number of inter-hamming differences is equal to the number of sections of the memory array minus one. ### Claim 5 (depends on 1) The memory device as claimed in claim 1, wherein the section of the memory array has an individual location in the memory array, and the inter-hamming difference analyzer determines the inter-hamming difference between a first content of a first section of the plurality of sections corresponding to the first operating condition and a second content of a second section of the plurality of sections corresponding to the second operating condition, wherein the first section and the second section have different locations in the memory array. ### Claim 6 (depends on 5) The memory device as claimed in claim 5, wherein when the determined inter-hamming difference is greater than the maximum inter-hamming difference, the inter-hamming difference analyzer assigns the determined inter-hamming difference as the maximum inter-hamming difference, and when the determined inter-hamming difference is less than the minimum inter-hamming difference, the inter-hamming difference analyzer assigns the determined inter-hamming difference as the minimum inter-hamming difference. ### Claim 7 (depends on 1) The memory device as claimed in claim 1, wherein power supplies, operation frequencies or operation temperatures of the first and second operating conditions are different. ### Claim 8 (depends on 1) The memory device as claimed in claim 1, wherein when the number of sections of the memory array is N, and the number of inter-hamming differences of the contents of the plurality of sections between the first and second operating conditions is N×(N−1). ### Claim 9 A method for measuring inter-hamming difference of a memory array divided into a plurality of sections, comprising: obtaining a plurality of first contents of the plurality of sections from the memory array when the memory array is operating in a first operating condition; obtaining a plurality of second contents of the plurality of sections from the memory array when the memory array is operating in a second operating condition, wherein power supplies, operation frequencies or operation temperatures of the first and second operating conditions are different; obtaining a plurality of inter-hamming differences between the first and second contents, wherein the inter-hamming difference represents the number of unlike bits between the first content of one section of the plurality of sections and the second content of another section of the plurality of sections; and obtaining an inter-hamming difference range according to a maximum inter-hamming difference and a minimum inter-hamming difference among the inter-hamming differences. ### Claim 10 (depends on 9) The method as claimed in claim 9, further comprising: obtaining a test result of the memory array according to the inter-hamming difference range and an intra-hamming difference range. ### Claim 11 (depends on 9) The method as claimed in claim 9, further comprising: storing the first contents of the plurality of sections from the memory array into a storage device having the same capacity as the memory array. ### Claim 12 (depends on 9) The method as claimed in claim 9, wherein obtaining the inter-hamming differences between the first and second contents further comprises: according to the first content of a first section of the plurality of sections corresponding to the first operating condition, determining the inter-hamming differences between the first content of the first section and the second contents of the plurality of sections except for the first section corresponding to the second operating condition, wherein the number of inter-hamming differences corresponding to the first content is equal to the number of sections of the memory array minus one. ### Claim 13 (depends on 9) The method as claimed in claim 9, wherein the section has an individual location in the memory array, and obtaining the inter-hamming differences between the first and second contents further comprises: determining the inter-hamming difference between the first content of a first section of the plurality of sections corresponding to the first operating condition and the second content of a second section of the plurality of sections corresponding to the second operating condition, wherein the first section and the second section have different locations in the memory array. ### Claim 14 (depends on 13) The method as claimed in claim 13, further comprising: assigning the determined inter-hamming difference as the maximum inter-hamming difference when the determined inter-hamming difference is greater than the maximum inter-hamming difference; and assigning the determined inter-hamming difference as the minimum inter-hamming difference when the determined inter-hamming difference is less than the minimum inter-hamming difference. ### Claim 15 (depends on 9) The method as claimed in claim 9, wherein when the number of sections of the memory array is N, and the number of inter-hamming differences of the contents of the plurality of sections between the first and second operating conditions is N×(N−1). ### Claim 16 A method for testing a memory array divided into a plurality of sections, comprising: applying a first operating condition to the memory array, and obtaining a plurality of first contents of the plurality of sections from the memory array operating in the first operating condition; after storing the first contents, applying a second operating condition to the memory array, and obtaining a plurality of second contents of the plurality of sections from the memory array operating in the second operating condition; obtaining a plurality of inter-hamming differences between the stored first contents and the second contents, wherein the inter-hamming difference represents the number of unlike bits between the stored first content of one section of the plurality of sections and the second content of another section of the plurality of sections; and obtaining a test result of the memory array according to a maximum inter-hamming difference and a minimum inter-hamming difference among the inter-hamming differences. ### Claim 17 (depends on 16) The method as claimed in claim 16, wherein obtaining the inter-hamming differences between the stored first contents and the second contents further comprises: according to the stored first content of a first section corresponding to the first operating condition, determining the inter-hamming differences between the stored first content of the first section and the second contents of the plurality of sections except for the first section corresponding to the second operating condition, wherein the number of inter-hamming differences corresponding to the first content is equal to the number of sections of the memory array minus one. ### Claim 18 (depends on 16) The method as claimed in claim 16, wherein the section has an individual location in the memory array, and obtaining the inter-hamming differences between the stored first contents and the second contents further comprises: determining the inter-hamming difference between the stored first content of a first section corresponding to the first operating condition and the second content of a second section corresponding to the second operating condition, wherein the first section and the second section have different locations in the memory array. ### Claim 19 (depends on 18) The method as claimed in claim 18, further comprising: assigning the determined inter-hamming difference as the maximum inter-hamming difference when the determined inter-hamming difference is greater than the maximum inter-hamming difference; and assigning the determined inter-hamming difference as the minimum inter-hamming difference when the determined inter-hamming difference is less than the minimum inter-hamming difference. ### Claim 20 (depends on 16) The method as claimed in claim 16, wherein when the number of sections of the memory array is N, and the number of inter-hamming differences of the contents of the plurality of sections between the first and second operating conditions is N×(N−1).