# US 10,372,422 B2 · Performance verification device for verifying performance of program, method, and recording medium having program recorded thereon for causing computer to perform the method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,372,422 B2 - Document ID: US10372422B2 - Status: Granted - Kind: B2 - Application number: 15/140,168 - Filed: 2016-04-27 - Published: 2016-11-03 - Granted: 2019-08-06 - Earliest claimed: 2015-04-28 - Assignees: Rensas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Rika Ono; Koichi Sato - Web page: https://patentgrep.com/patent/US10372422B2 ## CPC - G06F 8/30: Creation or generation of source code - G06F 8/20: Software design - G06F 8/35: model driven - G06F 9/455: Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract When generating a source code executed by a multi-core processor in order to verify performance of a control system, a device generates the source code as an object of execution by the multi-core processor from a control model, performs cooperative simulation, and measures an execution time of a program in the multi-core processor in the cooperative simulation. ## Claims ### Claim 1 A performance verification device for generating a C source code for verifying performance of a control system, the performance verification device comprising: a display device; and a processor device, wherein the processor device is configured to: select a code generation range as an object of simulation of a program to be executed in a multi-core processor, from a model of a control system displayed on the display device, accept designation of a plurality of parallel executable units as an object of a parallel process out of a plurality of processes included in the code generation range, associate each of the parallel executable units with a corresponding one of cores included in the multi-core processor, designate a sequence of execution of each of the associated parallel executable units, and synchronization between the cores, generate the C source code as an object of execution by the multi-core processor, based on each of the associated parallel executable units and the sequence of execution, execute the generated C source code in the multi-core processor, and communicate with the multi-core processor in order to perform cooperative simulation with a plant model, executed in a model simulator, and measure an execution time of the program executed in the multi-core processor in the cooperative simulation; and wherein the plant model includes a sensor and an actuator, and wherein the processor device is configured to determine, based on the execution time, whether or not the program has been able to be performed during a period of time from the input to the sensor to the output of a control value to the actuator. ### Claim 2 (depends on 1) The performance verification device according to claim 1, wherein the C source code includes identification information on each core, and a process block associated with each core as an object of a process by the core. ### Claim 3 (depends on 1) The performance verification device according to claim 1, wherein the C source code is common to each of the cores. ### Claim 4 (depends on 1) The performance verification device according to claim 1, further comprising an input/output device configured to communicate with the multi-core processor, wherein the display device displays a result of the execution of the C source code by the multi-core processor. ### Claim 5 (depends on 1) The performance verification device according to claim 1, wherein when accepting the designation of the parallel executable units, two or more processes dependent on each other out of the plurality of processes are excluded from the object of the parallel process. ### Claim 6 A method for causing a computer to generate a C source code for verifying performance of a control system, the method comprising: accepting selection of a code generation range as an object of simulation of a program to be executed in a multi-core processor, from a model of a control system; accepting designation of a plurality of parallel executable units as an object of a parallel process out of a plurality of processes included in the code generation range; associating each of the parallel executable units with a corresponding one of cores included in the multi-core processor; designating a sequence of execution of each of the associated parallel executable units, and synchronization between the cores; generating the C source code as an object of execution by the multi-core processor, based on each of the associated parallel executable units and the sequence of execution; executing the generated C source code in the multi-core processor, and communicating with the multi-core processor in order to perform cooperative simulation with a plant model, executed in a model simulator; measuring an execution time of the program executed in the multi-core processor in the cooperative simulation; and wherein the plant model includes a sensor and an actuator, wherein the method further comprises: determining, based on the execution time, whether or not the program has been able to be performed during a period of time from the input to the sensor to the output of a control value to the actuator. ### Claim 7 (depends on 6) The method according to claim 6, wherein the C source code includes identification information on each core, and a process block associated with each core as an object of a process by the core. ### Claim 8 (depends on 6) The method according to claim 6, wherein the C source code is common to each of the cores. ### Claim 9 (depends on 6) The method according to claim 6, further comprising: communicating with the multi-core processor; and displaying a result of the execution of the C source code by the multi-core processor. ### Claim 10 (depends on 6) The method according to claim 6, wherein designating includes excluding two or more processes dependent on each other out of the plurality of processes from the object of the parallel process. ### Claim 11 A machine-readable recording medium having a program recorded thereon in a non-transitory manner, the program for causing a computer to perform a method for generating a C source code for verifying performance of a control system, the program causing the computer to perform: accepting selection of a code generation range as an object of simulation of a program to be executed in a multi-core processor, from a model of a control system, accepting designation of a plurality of parallel executable units as an object of a parallel process out of a plurality of processes included in the code generation range, associating each of the parallel executable units with a corresponding one of cores included in the multi-core processor, designating a sequence of execution of each of the associated parallel executable units, and synchronization between the cores, generating the C source code as an object of execution by the multi-core processor, based on each of the associated parallel executable units and the sequence of execution, executing the generated C source code in the multi-core processor, and communicating with the multi-core processor in order to perform cooperative simulation with a plant model, executed in a model simulator, and measuring an execution time of the program executed in the multi-core processor in the cooperative simulation; and wherein the plant model includes a sensor and an actuator, and wherein the program further causes the computer to perform: determining, based on the execution time, whether or not the program has been able to be performed during a period of time from the input to the sensor to the output of a control value to the actuator. ### Claim 12 (depends on 11) The recording medium according to claim 11, wherein the C source code includes identification information on each core, and a process block associated with each core as an object of a process by the core. ### Claim 13 (depends on 11) The recording medium according to claim 11, wherein the C source code is common to each of the cores. ### Claim 14 (depends on 11) The recording medium according to claim 11, wherein the program further causes the computer to perform: communicating with the multi-core processor, and displaying a result of the execution of the C source code by the multi-core processor. ### Claim 15 (depends on 11) The recording medium according to claim 11, wherein designating includes excluding two or more processes dependent on each other out of the plurality of processes from the object of the parallel process.