# US 10,371,750 B1 · Minimization of over-masking in an on product multiple input signature register (OPMISR)

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- Number: US 10,371,750 B1
- Document ID: US10371750B1
- Status: Granted
- Kind: B1
- Application number: 16/119,605
- Filed: 2018-08-31
- Granted: 2019-08-06
- Earliest claimed: 2018-08-31
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Steven M. Douskey; Mary P. Kusko; Matthew B. Schallhorn
- Web page: https://patentgrep.com/patent/US10371750B1

## CPC

- G01R 31/3177: Testing of logic operation, e.g. by logic analysers
- G01R 31/318566: {Comparators; Diagnosing the device under test}
- G01R 31/318583: {Design for test}
- G06F 30/30: Circuit design
- G06F 30/327: Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
- G06F 30/333: Design for testability [DFT], e.g. scan chain or built-in self-test [BIST]
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A method and test circuit are provided for implementing enhanced scan data testing with minimization of over masking in an on product multiple input signature register (OPMISR) test, and a design structure on which the subject circuit resides. Common Channel Mask Scan Registers (CMSR) data is used with a multiple input signature register (MISR) in each satellite. A test algorithm control is used for implementing enhanced scan data testing by independently skewing scan unload shifting of selected OPMISR+ satellite by selected cycles. With this modified shifting, for the same test or a repeated run of the test, Channel Mask Enable (CME) triggered masking lines up on a different bit position in channels of each satellite avoiding over masking.

## Claims

### Claim 1

A method for implementing enhanced scan data testing with over masking minimization in an on product multiple input signature register (OPMISR) comprising:
providing a plurality of OPMISR satellites, each of the plurality of OPMISR satellites including a multiple input signature register (MISR) for data collection and a plurality of associated scan channels;
providing common Channel Mask Scan Registers (CMSR) data with the multiple input signature register (MISR) in each satellite;
using an algorithm for implementing enhanced scan data testing by independently skewing scan unload shifting of selected OPMISR+ satellites by selected cycles; and
providing Channel Mask Enable (CME) triggered masking on a different bit position in respective OPMISR+ satellite channels with the scan unload shifting for avoiding over masking.

### Claim 2 (depends on 1)

The method as recited in claim 1, wherein using said algorithm for implementing enhanced scan data testing enables data volume reduction and minimizing over masking.

### Claim 3 (depends on 1)

The method as recited in claim 1, wherein independently skewing scan unload shifting of selected OPMISR+ satellites by selected cycles comprises selecting a satellite with a longest masking string for most masking and using the selected OPMISR+ satellite as a base.

### Claim 4 (depends on 3)

The method as recited in claim 3, further comprising identifying remaining over masking in the other OPMISR+ satellites, and providing skewing scan unload shifting of other OPMISR+ satellites by selected cycles.

### Claim 5 (depends on 4)

The method as recited in claim 4, further comprising providing another skewing scan unload shifting of the other OPMISR+ satellites by selected cycles.

### Claim 6 (depends on 4)

The method as recited in claim 4, wherein providing skewing scan unload shifting of other OPMISR+ satellites by selected cycles comprises selecting at least one of the other OPMISR+ satellites for scan unload shifting together with selecting a number of cycles.

### Claim 7 (depends on 4)

The method as recited in claim 4, further comprising identifying remaining original over masking locations in the other OPMISR+ satellites.

### Claim 8 (depends on 7)

The method as recited in claim 7, further comprising selecting at least one of the other OPMISR+ satellites for scan unload shifting together with selecting a number of cycles, and providing another adjustment in the selected at least one of the other OPMISR+ satellites.

### Claim 9 (depends on 8)

The method as recited in claim 8, further comprising providing another skewing scan unload shifting of the selected at least one of the other OPMISR+ satellites by the selected cycles.

### Claim 10 (depends on 9)

The method as recited in claim 9, further comprising producing an OPMISR test with a resulting new pattern.

### Claim 11

A test circuit for implementing enhanced scan data testing with over masking minimization in an on product multiple input signature register (OPMISR) comprising:
a plurality of OPMISR+ satellites, each of the plurality of OPMISR+ satellites including a multiple input signature register (MISR) for data collection and a plurality of associated scan channels; and
a processor;
said processor using test algorithm control logic to implement enhanced scan data testing, which when implemented causes the processor to perform the following actions:
independently skewing scan unload shifting of selected OPMISR+ satellites by selected cycles; and
providing Channel Mask Enable (CME) triggered masking on a different bit position in respective OPMISR+ satellite channels with the scan unload shifting for avoiding over masking.

### Claim 12 (depends on 11)

The test circuit as recited in claim 11, includes control code stored on a computer readable medium, and wherein said processor uses the control code for implementing enhanced scan data testing.

### Claim 13 (depends on 11)

The test circuit as recited in claim 11, wherein the test algorithm control logic to independently skew scan unload shifting of selected OPMISR+ satellites by selected cycles comprises logic to select an OPMISR+ satellite with a longest masking string for most masking and using the selected satellite as a base.

### Claim 14 (depends on 13)

The test circuit as recited in claim 13, wherein the test algorithm control logic further comprises logic to identify remaining over masking in the other OPMISR+ satellites, and provide skewing scan unload shifting of other OPMISR+ satellites by selected cycles.

### Claim 15 (depends on 14)

The test circuit as recited in claim 14, wherein the test algorithm control logic further comprises logic to provide another skewing scan unload shifting of the other OPMISR+ satellites by selected cycles.

### Claim 16 (depends on 14)

The test circuit as recited in claim 14, wherein the logic to provide skewing scan unload shifting of other OPMISR+ satellites by selected cycles comprises logic to select at least one of other OPMISR+ satellites for scan unload shifting together with selecting a number of cycles.

### Claim 17 (depends on 14)

The test circuit as recited in claim 14, wherein the test algorithm control logic further comprises logic to identify remaining original over masking locations in the other OPMISR+ satellites.

### Claim 18 (depends on 17)

The test circuit as recited in claim 17, wherein the test algorithm control logic further comprises logic to select at least one of the other OPMISR+ satellites for scan unload shifting together with selecting a number of cycles, and provide another adjustment in the selected at least one of the other OPMISR+ satellites.

### Claim 19 (depends on 18)

The test circuit as recited in claim 18, wherein the test algorithm control logic further comprises logic to provide another skewing scan unload shifting of the selected at least one of the other OPMISR+ satellites by the selected cycles.

### Claim 20 (depends on 19)

The test circuit as recited in claim 19, wherein the test algorithm control logic further comprises logic to produce an OPMISR test with a resulting new pattern.