# US 10,369,595 B2 · Structure comprising a 2-dimensional material

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- Number: US 10,369,595 B2
- Document ID: US10369595B2
- Status: Granted
- Kind: B2
- Application number: 15/918,227
- Filed: 2018-03-12
- Published: 2018-07-12
- Granted: 2019-08-06
- Earliest claimed: 2015-10-19
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Pio Peter Niraj Nirmalraj
- Web page: https://patentgrep.com/patent/US10369595B2

## CPC

- H10D 62/80: characterised by the materials
- B05D 7/52: {Two layers}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 62/882: {Graphene}
- H10D 64/68: characterised by the insulator, e.g. by the gate insulator
- H10K 77/00: Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
- B05D 7/50: {Multilayers}
- B05D 2202/00: Metallic substrate
- B05D 2350/60: Adding a layer before coating
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B05D: PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL (conveying articles or workpieces through baths of liquid B65G, e.g. B65G49/02)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A semiconductor structure is provided including an electrically-conducting substrate and a layer of a two-dimensional material. The structure further includes a solid organic spacer layer arranged between the electrically-conducting substrate and the layer of the two-dimensional material.

## Claims

### Claim 1

A structure, comprising:
an electrically-conducting substrate;
a layer of a two-dimensional material; and
a solid organic spacer layer arranged between the electrically-conducting substrate and the layer of the two-dimensional material, wherein the solid organic spacer layer is an alkane (CnH2n+2), and wherein the alkane is C14H30,
wherein the electrically-conducting substrate has a root-mean-square surface roughness of less than 1 nanometer (nm), the organic spacer layer has a root-mean-square surface roughness of less than 2 nm, and the layer of the two-dimensional material has a root-mean-square surface roughness of less than 1 nm.

### Claim 2 (depends on 1)

The structure according to claim 1, wherein the conducting substrate comprises one of a metal and a semiconductor.

### Claim 3 (depends on 2)

The structure according to claim 2, wherein the conducting substrate comprises one of Au, Pd, Pt, Cu, Ge, and Si.

### Claim 4 (depends on 1)

The structure according to claim 1, wherein the organic spacer layer is a monolayer of organic molecules.

### Claim 5 (depends on 1)

The structure according to claim 1, wherein the two-dimensional material is selected from the group consisting of graphene, transition metal dichalcogenide (TMD), MoS2, W52, WSe2 and BN.

### Claim 6 (depends on 1)

The structure according to claim 1, wherein the spacer layer is configured to provide lower adhesion forces to the layer of the two-dimensional material than to the electrically-conducting substrate.

### Claim 7 (depends on 1)

The structure according to claim 1, wherein at least one of:
the electrically-conducting substrate has a root-mean-square surface roughness of less than 0.6 nm;
the organic spacer layer has a root-mean-square surface roughness of less than 1 nm; and
the layer of the two-dimensional material has a root-mean-square surface roughness of less than 0.5 nm.

### Claim 8

An electronic device including at least one structure, the at least one structure comprising:
an electrically-conducting substrate;
a solid organic spacer layer arranged on at least a portion of the electrically-conducting substrate and the layer of the two-dimensional material, wherein the solid organic spacer layer is a monolayer of an alkane (CnH2n+2), and wherein the alkane is C14H30; and
a layer of a two-dimensional material arranged on at least a portion of the solid organic spacer layer, wherein the electrically-conducting substrate has a root-mean-square surface roughness of less than 1 nanometer (nm), the organic spacer layer has a root-mean-square surface roughness of less than 2 nm, and the layer of the two-dimensional material has a root-mean-square surface roughness of less than 1 nm.