Image processing apparatus and electronic device including the same

An image processing apparatus comprising:

• at least one synchronizer configured to receive first frame data and second frame data different from the first frame data, from at least one image sensor;
• a memory configured to receive at least part of the first frame data and at least part of the second frame data from the at least one synchronizer and to store the at least part of the first frame data and the at least part of the second frame data;
• a line interleaving controller configured to output first line data, which is included in the first frame data stored in the memory, and second line data, which is included in the second frame data stored in the memory, through time division multiplexing;
• and
• an image signal processor configured to perform image processing, in units of lines, on the first line data and the second line data that are output by the line interleaving controller,
• wherein the at least one image sensor comprises a first image sensor, which is configured to generate the first frame data, and a second image sensor, which is configured to generate the second frame data,
• wherein the first image sensor is further configured to generate the first frame data with a first frame rate, and
• wherein the second image sensor is further configured to generate the second frame data with a second frame rate, which is different from the first frame rate.

An electronic device, comprising:

• a processor;
• a memory;
• and
• an image processing apparatus connected to the processor and the memory via a bus, the image processing apparatus comprising:
• at least one image sensor,
• at least one synchronizer configured to receive first frame data and second frame data, which is different from the first frame data, from the at least one image sensor, and provide at least part of the first frame data and at least part of the second frame data to the memory,
• a line interleaving controller configured to output first line data, which is included in the first frame data stored in the memory, and second line data, which is included in the second frame data stored in the memory, through time division multiplexing, and
• an image signal processor configured to perform image processing, in units of lines, on the first line data and the second line data that are output by the line interleaving controller,
• wherein the second frame data is created by a same image sensor as the first frame data at a first time later than a second time at which the first frame data is created.

A method comprising:

• sequentially storing, in a first synchronizer, a first row of a first frame data generated by a first image sensor;
• generating a first line data based on the first row of the first frame data stored in the first synchronizer;
• writing, in a memory by the first synchronizer, the first line data and transmitting a first grant signal to a line interleaving controller;
• upon receiving the first grant signal, reading, by the line interleaving controller, the first line data;
• transmitting, by the line interleaving controller, the first line data to an image signal processor via time division multiplexing.