US 10,361,627 B1 · Reduction of low frequency noise in a discrete spread spectrum timebase

Abstract

An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator. The timebase generator comprises a first linear feedback shift register (LFSR), a signal generator having an input coupled to an output of the first LFSR; and a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider.

Claims20

Dependent claims

An integrated circuit, comprising:

a timebase generator that comprises:
a first linear feedback shift register (LFSR);
a signal generator having an input coupled to an output of the first LFSR;
and
a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider;
and
a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator.

4 more elements

Dependencies are inferred from the claim text.

Reduction of low frequency noise in a discrete spread spectrum timebase

Life of this patent

Reduction of low frequency noise in a discrete spread spectrum timebase

Life of this patent

Abstract

Claims20