Fuse in chip design
AssigneeVISHAY BCcomponents BEYSCHLAG GmbH
InventorsWerner Blum, Reiner Friedrich, Wolfgang Werner, Reimer Hinrichs
Life of this patent
Estimating the term…
Abstract
To produce a cost-effective fuse in chip design, which is applied to a carrier substrate made of a Al2O3 ceramic having a high thermal conductivity, and which is provided with a fusible metallic conductor and a cover layer, in which the melting point of the metallic conductor may be defined reliably, it is suggested that an intermediate layer having low thermal conductivity be positioned between the carrier substrate and the metallic conductor, the intermediate layer being formed by a low-melting-point inorganic glass paste applied in the screen-printing method or an organic intermediate layer applied in island printing. Furthermore, a method for manufacturing the fuse is specified.
Claims20
A fuse in chip design, comprising:
- a substrate having a first surface facing in a first direction;
- an intermediate layer disposed on the first surface of the substrate and leaving exposed portions of the first surface of the substrate;
- an adhesive layer completely covering and in contact with the intermediate layer and the exposed portions of the first surface of the substrate;
- a fusible metallic conductor covering and in contact with at least a portion of the adhesive layer;
- a cover layer coated over at least a part of the fusible metallic conductor and over and in contact with at least a portion of the adhesive layer, the cover layer leaving exposed a first area having a first surface facing in the first direction comprising portions of the fusible metallic conductor and portions of the adhesive layer that remain uncovered on a first side of the cover layer, and a second area having a first surface facing in the first direction comprising portions of the fusible metallic conductor and portions of the adhesive layer that remain uncovered on a second side of the cover layer;
- a first contact plated directly to the first surface of the first area;
- and
- a second contact plated directly to the first surface of the second area.
A method for manufacturing a fuse in chip design, comprising the steps of:
- forming an intermediate layer on a first surface of a substrate while leaving exposed portions of the first surface of the substrate, the first surface of the substrate facing in a first direction;
- forming an adhesive layer in direct contact with and completely covering the intermediate layer and exposed portions of the first surface of the substrate;
- forming a fusible metallic conductor on and in direct contact with at least a portion of the adhesive layer;
- coating a cover layer over at least a part of the fusible metallic conductor and over and in contact with at least a portion of the adhesive layer, the cover layer leaving exposed a first area having a first surface facing in the first direction comprising portions of the fusible metallic conductor and portions of the adhesive layer that remain uncovered on a first side of the cover layer and a second area having a first surface facing in the first direction comprising portions of the fusible metallic conductor and portions of the adhesive layer that remain uncovered on a second side of the cover layer;
- plating a first contact directly to the first surface of the first area;
- and
- plating a second contact directly to the first surface of the second area.
Dependencies are inferred from the claim text.