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US 10,354,712 B2Granted
Ferroelectric memory cells
AssigneeMicron Technology, Inc.
InventorsScott J. Derner, Christopher J. Kawamura
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods are disclosed that include ferroelectric memory cells. An example ferroelectric memory cell includes two transistors and two capacitors. Another example ferroelectric memory cell includes three transistors and two capacitors. Another example ferroelectric memory cell includes four transistors and two capacitors.
Claims18
An apparatus, comprising:
- a first capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to a plate line structure;
- a second capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to the plate line structure;
- a first transistor vertically displaced relative to the first capacitor and coupled to the second plate of the first capacitor;
- and
- a second transistor vertically displaced relative to the second capacitor and coupled to the second plate of the second capacitor, wherein the first plate of the first capacitor and the first plate of the second capacitor are inner plates configured to fit into a respective outer plate.
2 more elements
An apparatus comprising:
- a first capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to a plate line structure;
- a second capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to the plate line structure;
- a first transistor vertically displaced relative to the first capacitor and coupled to the second plate of the first capacitor:
- and
- a second transistor vertically displaced relative to the second capacitor and coupled to the second plate of the second capacitor, wherein the first plate of the first capacitor and the first plate of the second capacitor have a different composition than a composition of the plate line structure.
2 more elements
An apparatus, comprising:
- a first memory cell;
- a second memory cell;
- and
- a plate line structure coupled to the first memory cell and the second memory cell;
- wherein each memory cell comprises:
- a first transistor;
- a first ferroelectric capacitor including a ferroelectric material, coupled to the first transistor and vertically displaced relative to the first transistor;
- a second transistor;
- and
- a second ferroelectric capacitor coupled to the second transistor and vertically displaced relative to the second transistor, wherein a plate of the first ferroelectric capacitor and a plate of the second ferroelectric capacitor have a different composition than a composition of the plate line structure.
7 more elements
A method of accessing a memory cell, comprising:
- activating first and second transistors of the memory cell;
- applying a voltage to a plate line coupled to first and second ferroelectric capacitors, the first ferroelectric capacitor coupled to the first transistor and vertically displaced relative to the first transistor and the second ferroelectric capacitor coupled to the second transistor and vertically displaced relative to the second transistor;
- comparing a first voltage developed at a first digit line coupled to the first ferroelectric capacitor to a second voltage developed at a second digit line coupled to the second ferroelectric capacitor;
- and
- changing a voltage in the first digit line and the second digit line based on applying the voltage to the plate line coupled to the first and second ferroelectric capacitors.
2 more elements
Dependencies are inferred from the claim text.