Device and method for on-chip mechanical stress sensing

An integrated circuit (IC) chip comprising:

• a substrate comprising a piezoelectric material having a first resistivity coefficient for a first direction longitudinal to a crystal axis and a second resistivity coefficient for a second direction transverse to the crystal axis, the first and second resistivity coefficients having opposite signs;
• and
• a stress sensing element formed in the substrate, the stress sensing element comprising
• a first resistor adapted to be coupled between a first current source and a voltage rail, the first resistor aligned to conduct current primarily in the first direction;
• a first voltage point between the first resistor and the first current source;
• a second resistor adapted to be coupled between a second current source and the voltage rail, the second resistor aligned to conduct current primarily in the second direction, a ratio between a current from the first current source and a current from the second current source being proportional to a value α, the value α being equal to a ratio between the second resistivity coefficient and the first resistivity coefficient;
• a second voltage point between the second resistor and the second current source;
• and
• a combining circuit configured to add a first voltage at the first voltage point and a second voltage at the second voltage point, and to generate a third voltage responsive to the adding, the third voltage being proportional to a component of stress for the second direction.

An integrated circuit (IC) chip comprising:

• a substrate comprising a piezoelectric material having a first resistivity coefficient for a first direction longitudinal to a crystal axis and a second resistivity coefficient for a second direction transverse to the crystal axis, the first and second resistivity coefficients having opposite signs;
• and
• a stress sensing element formed in the substrate, the stress sensing element comprising:
• a first resistor adapted to be coupled between a first current source and a voltage rail, the first resistor aligned to conduct current primarily in the first direction;
• a second resistor adapted to be coupled between a second current source and the voltage rail, the second resistor aligned to conduct current primarily in a third direction orthogonal to both the first and second directions, a current from the first current source being proportional to a current from the second current source;
• and
• a difference circuit having:
• a first input adapted to be coupled to a first voltage node between the first resistor and the first current source;
• a second input adapted to be coupled to a second voltage node between the second resistor and the second current source;
• and an output coupled to a third voltage node;
• the difference circuit configured to make a voltage at the third voltage node proportional to a difference between respective voltages at the first voltage node and the second voltage node.